Jun Lin

According to our database, Jun Lin authored at least 158 papers between 2008 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Amoeba: An Efficient and Flexible FPGA-Based Accelerator for Arbitrary-Kernel CNNs.

Xiao Wu, Miaoxin Wang, Jun Lin, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., June, 2024

WinTA: An Efficient Reconfigurable CNN Training Accelerator With Decomposition Winograd.

Jinming Lu, Hui Wang, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

SPEED: A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference.

Chuanning Wang, Chao Fang, Xiao Wu, Zhongfeng Wang, Jun Lin

CoRR, 2024

An FPGA-Based Accelerator Enabling Efficient Support for CNNs with Arbitrary Kernel Sizes.

Miaoxin Wang, Xiao Wu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference.

Chuanning Wang, Chao Fang, Xiao Wu, Zhongfeng Wang, Jun Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge.

Longwei Huang, Chao Fang, Qiong Li, Jun Lin, Zhongfeng Wang

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

An Efficient Massive MIMO Detector Based on Approximate Expectation Propagation.

Yangyang Chen, Suwen Song, Zhongfeng Wang, Jun Lin

IEEE Trans. Very Large Scale Integr. Syst., May, 2023

Fast and Accurate FSA System Using ELBERT: An Efficient and Lightweight BERT.

Siyuan Lu, Chenchen Zhou, Keli Xie, Jun Lin, Zhongfeng Wang

IEEE Trans. Signal Process., 2023

An FPGA-Based Reconfigurable CNN Training Accelerator Using Decomposable Winograd.

Hui Wang, Jinming Lu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

2022

Rethinking Adaptive Computing: Building a Unified Model Complexity-Reduction Framework With Adversarial Robustness.

Meiqi Wang, Liulu He, Jun Lin, Zhongfeng Wang

IEEE Trans. Neural Networks Learn. Syst., 2022

A Proximal Iteratively Reweighted Approach for Efficient Network Sparsification.

Hao Wang, Xiangyu Yang, Yuanming Shi, Jun Lin

IEEE Trans. Computers, 2022

Efficient Software Implementation of the SIKE Protocol Using a New Data Representation.

Jing Tian, Piaoyang Wang, Zhe Liu, Jun Lin, Zhongfeng Wang, Johann Großschädl

IEEE Trans. Computers, 2022

Fast and Accurate FSA System Using ELBERT: An Efficient and Lightweight BERT.

Siyuan Lu, Chenchen Zhou, Keli Xie, Shiyi Liu, Jun Lin, Zhongfeng Wang

CoRR, 2022

Forecasting Stock Indexes with Metabolic DWT and MWA-GM(1,1).

Ziyang Jiang, Siyuan Lu, Jun Lin, Zhongfeng Wang

Proceedings of the 14th International Conference on Wireless Communications and Signal Processing, 2022

An Efficient FPGA Accelerator for Point Cloud.

Zilun Wang, Wendong Mao, Peixiang Yang, Zhongfeng Wang, Jun Lin

Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

A Reconfigurable Approach for Deconvolutional Network Acceleration with Fast Algorithm.

Peixiang Yang, Wendong Mao, Zhongfeng Wang, Jun Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Accelerate Three-Dimensional Generative Adversarial Networks Using Fast Algorithm.

Ziqi Su, Wendong Mao, Zhongfeng Wang, Jun Lin, Wenqiang Wang, Haitao Sun

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

An Efficient Hardware Accelerator for Sparse Transformer Neural Networks.

Chao Fang, Shouliang Guo, Wei Wu, Jun Lin, Zhongfeng Wang, Ming Kai Hsu, Lingzhi Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Magical-Decomposition: Winning Both Adversarial Robustness and Efficiency on Hardware.

Xin Cheng, Meiqi Wang, Yu-Bo Shi, Jun Lin, Zhongfeng Wang

Proceedings of the International Conference on Machine Learning and Cybernetics, 2022

An Efficient CNN Training Accelerator Leveraging Transposable Block Sparsity.

Mingyang Xu, Jinming Lu, Zhongfeng Wang, Jun Lin

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

Fast Modular Multipliers for Supersingular Isogeny-Based Post-Quantum Cryptography.

Jing Tian, Jun Lin, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., 2021

An Efficient and Flexible Accelerator Design for Sparse Convolutional Neural Networks.

Xiaoru Xie, Jun Lin, Zhongfeng Wang, Jinghe Wei

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Low-Latency Hardware Accelerator for Improved Engle-Granger Cointegration in Pairs Trading.

Shuang Liang, Siyuan Lu, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Design of High-Performance and Area-Efficient Decoder for 5G LDPC Codes.

Hangxuan Cui, Fakhreddine Ghaffari, Khoa Le, David Declercq, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Evaluations on Deep Neural Networks Training Using Posit Number System.

Jinming Lu, Chao Fang, Mingyang Xu, Jun Lin, Zhongfeng Wang

IEEE Trans. Computers, 2021

An Improved Reliability-Based Decoding Algorithm for NB-LDPC Codes.

Suwen Song, Jing Tian, Jun Lin, Zhongfeng Wang

IEEE Commun. Lett., 2021

Automatic Generation of Dynamic Inference Architecture for Deep Neural Networks.

Shize Zhao, Liulu He, Xiaoru Xie, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

An FPGA-Based Reconfigurable Accelerator for Low-Bit DNN Training.

Haikuo Shao, Jinming Lu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

PipeBSW: A Two-Stage Pipeline Structure for Banded Smith-Waterman Algorithm on FPGA.

Luyi Li, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

Counter Random Gradient Descent Bit-Flipping Decoder for LDPC Codes.

Keyue Deng, Hangxuan Cui, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

2020

F-DNA: Fast Convolution Architecture for Deconvolutional Network Acceleration.

Wendong Mao, Jun Lin, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., 2020

Information Storage Bit-Flipping Decoder for LDPC Codes.

Hangxuan Cui, Jun Lin, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., 2020

Efficient Precision-Adjustable Architecture for Softmax Function in Deep Learning.

Danyang Zhu, Siyuan Lu, Meiqi Wang, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst., 2020

Optimized Trellis-Based Min-Max Decoder for NB-LDPC Codes.

Jing Tian, Suwen Song, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2020

A Novel Iterative Reliability-Based Majority-Logic Decoder for NB-LDPC Codes.

Suwen Song, Hangxuan Cui, Jing Tian, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2020

A Precision-Scalable Energy-Efficient Convolutional Neural Network Accelerator.

Wenjian Liu, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst., 2020

Fine-Grained Bit-Flipping Decoding for LDPC Codes.

Yuxing Chen, Hangxuan Cui, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2020

A lightweight face detector by integrating the convolutional neural network with the image pyramid.

Jiapeng Luo, Jiaying Liu, Jun Lin, Zhongfeng Wang

Pattern Recognit. Lett., 2020

Multi-Layer Generalized Integrated Interleaved Codes.

Wenjie Li, Jun Lin, Zhongfeng Wang

IEEE Commun. Lett., 2020

Faster Software Implementation of the SIKE Protocol Based on A New Data Representation.

Jing Tian, Piaoyang Wang, Zhe Liu, Jun Lin, Zhongfeng Wang, Johann Großschädl

IACR Cryptol. ePrint Arch., 2020

Ultra-Fast Modular Multiplication Implementation for Isogeny-Based Post-Quantum Cryptography.

Jing Tian, Jun Lin, Zhongfeng Wang

IACR Cryptol. ePrint Arch., 2020

Hardware Accelerator for Multi-Head Attention and Position-Wise Feed-Forward in the Transformer.

Siyuan Lu, Meiqi Wang, Shuang Liang, Jun Lin, Zhongfeng Wang

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

A Configurable FPGA Accelerator of Bi-LSTM Inference with Structured Sparsity.

Shouliang Guo, Chao Fang, Jun Lin, Zhongfeng Wang

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Temporal Residual Feature Learning for Efficient 3D Convolutional Neural Network on Action Recognition Task.

Haonan Wang, Yuchen Mei, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

A Reconfigurable DNN Training Accelerator on FPGA.

Jinming Lu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

Financial Time Series Forecasting Model Based on EMD and Rolling Grey Model.

Binjing Li, Fenggui Liu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

A Serial Maximum-likelihood Detection Algorithm for Massive MIMO Systems.

Jing Zeng, Jun Lin, Zhongfeng Wang

Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

A Computation-Efficient Solution for Acceleration of Generative Adversarial Network.

Peixiang Yang, Wendong Mao, Jun Lin, Zhongfeng Wang

Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Exploring Quantization in Few-Shot Learning.

Meiqi Wang, Ruixin Xue, Jun Lin, Zhongfeng Wang

Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

A Three-Level Scoring System for Fast Similarity Evaluation Based on Smith-Waterman Algorithm.

Yujie Zhang, Jiajun Wu, Minghao Li, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Hardware Accelerator for Engle-Granger Cointegration in Pairs Trading.

Shuang Liang, Siyuan Lu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

LSTM-Based Quantitative Trading Using Dynamic K-Top and Kelly Criterion.

Binjing Li, Keli Xie, Siyuan Lu, Jun Lin, Zhongfeng Wang

Proceedings of the 2020 International Joint Conference on Neural Networks, 2020

In-Memory Computing: The Next-Generation AI Computing Paradigm.

Yufei Ma, Yuan Du, Li Du, Jun Lin, Zhongfeng Wang

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

LBFP: Logarithmic Block Floating Point Arithmetic for Deep Neural Networks.

Chao Ni, Jinming Lu, Jun Lin, Zhongfeng Wang

Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020

Efficient FPGA design for Convolutions in CNN based on FFT-pruning.

Liulu He, Xiaoru Xie, Jun Lin, Zhongfeng Wang

Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020

2019

Analysis and Design of a Large Dither Injection Circuit for Improving Linearity in Pipelined ADCs.

Congyi Zhu, Renrong Liang, Jun Lin, Zhongfeng Wang, Li Li

IEEE Trans. Very Large Scale Integr. Syst., 2019

Background Calibration of Comparator Offsets in SHA-Less Pipelined ADCs.

Congyi Zhu, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2019

A New Clock Phase Calibration Method in High-Speed and High-Resolution DACs.

Congyi Zhu, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2019

A High-Speed Successive-Cancellation Decoder for Polar Codes Using Approximate Computing.

Yangcan Zhou, Zhiyu Chen, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2019

FPAP: A Folded Architecture for Energy-Quality Scalable Convolutional Neural Networks.

Yizhi Wang, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 124-Gb/s Decoder for Generalized Integrated Interleaved Codes.

Wenjie Li, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Improved Gradient Descent Bit-Flipping Decoder for LDPC Codes.

Hangxuan Cui, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An Efficient Post-Processor for Lowering the Error Floor of LDPC Codes.

Hangxuan Cui, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Improved Fast-SSC-Flip Decoding of Polar Codes.

Yangcan Zhou, Jun Lin, Zhongfeng Wang

IEEE Commun. Lett., 2019

Modified GII-BCH Codes for Low-Complexity and Low-Latency Encoders.

Wenjie Li, Jing Tian, Jun Lin, Zhongfeng Wang

IEEE Commun. Lett., 2019

High-Speed Modular Multipliers for Isogeny-Based Post-Quantum Cryptography.

Jing Tian, Zhe Liu, Jun Lin, Zhongfeng Wang, Binjing Li

IACR Cryptol. ePrint Arch., 2019

E-LSTM: An Efficient Hardware Architecture for Long Short-Term Memory.

Meiqi Wang, Zhisheng Wang, Jinming Lu, Jun Lin, Zhongfeng Wang

IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

Design Light-weight 3D Convolutional Networks for Video Recognition Temporal Residual, Fully Separable Block, and Fast Algorithm.

Haonan Wang, Jun Lin, Zhongfeng Wang

CoRR, 2019

Efficient T-EMS Based Decoding Algorithms for High-Order LDPC Codes.

Jing Tian, Suwen Song, Jun Lin, Zhongfeng Wang

IEEE Access, 2019

A Hardware-Oriented and Memory-Efficient Method for CTC Decoding.

Siyuan Lu, Jinming Lu, Jun Lin, Zhongfeng Wang

IEEE Access, 2019

Training Deep Neural Networks Using Posit Number System.

Jinming Lu, Siyuan Lu, Zhisheng Wang, Chao Fang, Jun Lin, Zhongfeng Wang, Li Du

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

Hybrid Preconditioned CG Detection with Sequential Update for Massive MIMO Systems.

Jing Zeng, Jun Lin, Zhongfeng Wang, Yun Chen

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

A Low-Complexity Error-and-Erasure Decoding Algorithm for t=2 RS Codes.

Zengchao Yan, Wenjie Li, Jun Lin, Zhongfeng Wang

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

DynExit: A Dynamic Early-Exit Strategy for Deep Residual Networks.

Meiqi Wang, Jianqiao Mo, Jun Lin, Zhongfeng Wang, Li Du

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

A Low-Latency and Low-Complexity Hardware Architecture for CTC Beam Search Decoding.

Siyuan Lu, Jinming Lu, Jun Lin, Zhongfeng Wang, Li Du

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

EAGLE: Exploiting Essential Address in Both Weight and Activation to Accelerate CNN Computing.

Wenjian Liu, Xiayuan Wen, Jun Lin, Zhongfeng Wang, Li Du

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

Hardware Implementation of Improved Fast-SSC-Flip Decoder for Polar Codes.

Jing Zeng, Yangcan Zhou, Jun Lin, Zhongfeng Wang

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

A Low-Complexity RS Decoder for Triple-Error-Correcting RS Codes.

Zengchao Yan, Jun Lin, Zhongfeng Wang

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Fast-ABC: A Fast Architecture for Bottleneck-Like Based Convolutional Neural Networks.

Xiaoru Xie, Fangxuan Sun, Jun Lin, Zhongfeng Wang

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

A Decomposition Mapping based Quantized Belief Propagation Decoding for 5G LDPC Codes.

Hangxuan Cui, Khoa Le, Fakhreddine Ghaffari, David Declercq, Jun Lin, Zhongfeng Wang

Proceedings of the 19th International Symposium on Communications and Information Technologies, 2019

A Novel Low-Complexity Joint Coding and Decoding Algorithm for NB-LDPC Codes.

Suwen Song, Jing Tian, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Methodology for Efficient Reconfigurable Architecture of Generative Neural Network.

Wendong Mao, Jichen Wang, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

USCA: A Unified Systolic Convolution Array Architecture for Accelerating Sparse Neural Network.

Wenjian Liu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A New Probabilistic Gradient Descent Bit Flipping Decoder for LDPC Codes.

Hangxuan Cui, Jun Lin, Suwen Song, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

TIE: energy-efficient tensor train-based inference engine for deep neural network.

Chunhua Deng, Fangxuan Sun, Xuehai Qian, Jun Lin, Zhongfeng Wang, Bo Yuan

Proceedings of the 46th International Symposium on Computer Architecture, 2019

A New Fast-SSC-Flip Decoding of Polar Codes.

Yangcan Zhou, Jun Lin, Zhongfeng Wang

Proceedings of the 2019 IEEE International Conference on Communications, 2019

A Low-latency Sparse-Winograd Accelerator for Convolutional Neural Networks.

Haonan Wang, Wenjian Liu, Tianyi Xu, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Conference on Acoustics, 2019

Redundancy-Aided Iterative Reliability-Based Majority-Logic Decoding for NB-LDPC Codes.

Suwen Song, Jing Tian, Jun Lin, Zhongfeng Wang

Proceedings of the 13th IEEE International Conference on ASIC, 2019

An Enhanced Offset Min-Sum decoder for 5G LDPC Codes.

Hangxuan Cui, Khoa LeTrung, Fakhreddine Ghaffari, David Declercq, Jun Lin, Zhongfeng Wang

Proceedings of the 25th Asia-Pacific Conference on Communications, 2019

2018

Low Complexity Message Passing Detection Algorithm for Large-Scale MIMO Systems.

Jing Zeng, Jun Lin, Zhongfeng Wang

IEEE Wirel. Commun. Lett., 2018

A Stage-Combined Belief Propagation Decoder for Polar Codes.

Jin Sha, Jingbo Liu, Jun Lin, Zhongfeng Wang

J. Signal Process. Syst., 2018

An Energy-Efficient Architecture for Binary Weight Convolutional Neural Networks.

Yizhi Wang, Jun Lin, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., 2018

An Improved Gauss-Seidel Algorithm and Its Efficient Architecture for Massive MIMO Systems.

Jing Zeng, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2018

Efficient Hardware Architectures for Deep Convolutional Neural Network.

Jichen Wang, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 21.66 Gbps Nonbinary LDPC Decoder for High-Speed Communications.

Jing Tian, Jun Lin, Zhongfeng Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2018

Hardware-Oriented Compression of Long Short-Term Memory for Efficient Inference.

Zhisheng Wang, Jun Lin, Zhongfeng Wang

IEEE Signal Process. Lett., 2018

Parameter-Free ℓ_p-Box Decoding of LDPC Codes.

Qiong Wu, Fan Zhang, Hao Wang, Jun Lin, Yang Liu

IEEE Commun. Lett., 2018

SGAD: Soft-Guided Adaptively-Dropped Neural Network.

Zhisheng Wang, Fangxuan Sun, Jun Lin, Zhongfeng Wang, Bo Yuan

CoRR, 2018

Approximate Comparator: Design and Analysis.

Yangcan Zhou, Jun Lin, Jichen Wang, Zhongfeng Wang

Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

Bandwidth Efficient Architectures for Convolutional Neural Network.

Jichen Wang, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

A Low-Complexity Massive MIMO Detection Algorithm Based on Matrix Partition.

Yahui Ji, Zhizhen Wu, Yifei Shen, Jun Lin, Zaichen Zhang, Xiaohu You, Chuan Zhang

Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

FPAP: A Folded Architecture for Efficient Computing of Convolutional Neural Networks.

Yizhi Wang, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

An Optimized Architecture For Decomposed Convolutional Neural Networks.

Fangxuan Sun, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

An Efficient Convolution Core Architecture for Privacy-Preserving Deep Learning.

Yizhi Wang, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A New Soft-input Hard-output decoding algorithm for Turbo Product Codes.

Yaqi Wang, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An Efficient NB-LDPC Decoding Algorithm for Next-Generation Memories.

Jing Tian, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Approximate Belief Propagation Decoder for Polar Codes.

Menghui Xu, Shusen Jing, Jun Lin, Weikang Qian, Zaichen Zhang, Xiaohu You, Chuan Zhang

Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

Eadnet: Efficient Architecture for Decomposed Convolutional Neural Networks.

Fangxuan Sun, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

Fast and Low-Complexity Decoding Algorithm and Architecture for Quadruple-Error-Correcting RS codes.

Zengchao Yan, Wenjie Li, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

A High-Speed and Low-Complexity Architecture for Softmax Function in Deep Learning.

Meiqi Wang, Siyuan Lu, Danyang Zhu, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

Analysis of the Dual-Threshold-Based Shrinking Scheme for Efficient NB-LDPC Decoding.

Jing Tian, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

A Novel Compiler for Regular Expression Matching Engine Construction.

Xin Jin, Jun Lin, Zhongfeng Wang

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

Efficient Reconfigurable Hardware Core for Convolutional Neural Networks.

Haonan Wang, Jun Lin, Yi Xie, Bo Yuan, Zhongfeng Wang

Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

2017

Accelerating Recurrent Neural Networks: A Memory-Efficient Approach.

Zhisheng Wang, Jun Lin, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., 2017

Efficient Soft Cancelation Decoder Architectures for Polar Codes.

Jun Lin, Zhiyuan Yan, Zhongfeng Wang

IEEE Trans. Very Large Scale Integr. Syst., 2017

Optimized sorting network for successive cancellation list decoding of polar codes.

Kun Wang, Li Li, Feng Han, Fan Feng, Jun Lin, Yuxiang Fu, Jin Sha

IEICE Electron. Express, 2017

An access pattern based adaptive mapping function for GPGPU scratchpad memory.

Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Jin Sha, Jun Lin

IEICE Electron. Express, 2017

Reduced complexity message passing detection algorithm in large-scale MIMO systems.

Haochuan Zhu, Jun Lin, Zhongfeng Wang

Proceedings of the 9th International Conference on Wireless Communications and Signal Processing, 2017

Low-complexity detection algorithms based on matrix partition for massive MIMO.

Haijian Wu, Jun Lin, Chuan Zhang, Zhongfeng Wang

Proceedings of the 9th International Conference on Wireless Communications and Signal Processing, 2017

Efficient approximate layered LDPC decoder.

Yangcan Zhou, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Energy efficient SVM classifier using approximate computing.

Yangcan Zhou, Jun Lin, Zhongfeng Wang

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

A Multimode Area-Efficient SCL Polar Decoder.

Chenrong Xiong, Jun Lin, Zhiyuan Yan

IEEE Trans. Very Large Scale Integr. Syst., 2016

A High Throughput List Decoder Architecture for Polar Codes.

Jun Lin, Chenrong Xiong, Zhiyuan Yan

IEEE Trans. Very Large Scale Integr. Syst., 2016

Symbol-Decision Successive Cancellation List Decoder for Polar Codes.

Chenrong Xiong, Jun Lin, Zhiyuan Yan

IEEE Trans. Signal Process., 2016

Design and implementation of high performance matrix inversion based on reconfigurable processor.

Kun Wang, Li Li, Feng Han, Fan Feng, Jun Lin

IEICE Electron. Express, 2016

An ultra-long FFT architecture implemented in a reconfigurable application specified processor.

Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Baoning Zhang, Guoqiang He, Jun Lin

IEICE Electron. Express, 2016

Efficient convolution architectures for convolutional neural network.

Jichen Wang, Jun Lin, Zhongfeng Wang

Proceedings of the 8th International Conference on Wireless Communications & Signal Processing, 2016

Intra-layer nonuniform quantization of convolutional neural network.

Fangxuan Sun, Jun Lin, Zhongfeng Wang

Proceedings of the 8th International Conference on Wireless Communications & Signal Processing, 2016

An Efficient Hardware Architecture for Lossless Data Compression in Data Center.

Zhisheng Wang, Jun Lin, Zhongfeng Wang

Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

Stage-combined belief propagation decoding of polar codes.

Jin Sha, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A high throughput belief propagation decoder architecture for polar codes.

Jun Lin, Jin Sha, Li Li, Chenrong Xiong, Zhiyuan Yan, Zhongfeng Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Accurate runtime thermal prediction scheme for 3D NoC systems with noisy thermal sensors.

Yuxiang Fu, Li Li, Hongbing Pan, Kun Wang, Feng Han, Jun Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Error performance analysis of the symbol-decision SC polar decoder.

Chenrong Xiong, Jun Lin, Zhiyuan Yan

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

2015

An Efficient List Decoder Architecture for Polar Codes.

Jun Lin, Zhiyuan Yan

IEEE Trans. Very Large Scale Integr. Syst., 2015

A multi-mode area-efficient SCL polar decoder.

Chenrong Xiong, Jun Lin, Zhiyuan Yan

CoRR, 2015

Efficient approximate ML decoding units for polar list decoders.

Chenrong Xiong, Jun Lin, Zhiyuan Yan

Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Reduced complexity belief propagation decoders for polar codes.

Jun Lin, Chenrong Xiong, Zhiyuan Yan

Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

A hybrid partial sum computation unit architecture for list decoders of polar codes.

Jun Lin, Zhiyuan Yan

Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

2014

Efficient Error Control Decoder Architectures for Noncoherent Random Linear Network Coding.

Jun Lin, Hongmei Xie, Zhiyuan Yan

J. Signal Process. Syst., 2014

An Efficient Fully Parallel Decoder Architecture for Nonbinary LDPC Codes.

Jun Lin, Zhiyuan Yan

IEEE Trans. Very Large Scale Integr. Syst., 2014

Symbol-based successive cancellation list decoder for polar codes.

Chenrong Xiong, Jun Lin, Zhiyuan Yan

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

A reduced latency list decoding algorithm for polar codes.

Jun Lin, Chenrong Xiong, Zhiyuan Yan

Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Efficient list decoder architecture for polar codes.

Jun Lin, Zhiyuan Yan

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Efficient Shuffled Decoder Architecture for Nonbinary Quasi-Cyclic LDPC Codes.

Jun Lin, Zhiyuan Yan

IEEE Trans. Very Large Scale Integr. Syst., 2013

Linearized Polynomial Interpolation and Its Applications.

Hongmei Xie, Jun Lin, Zhiyuan Yan, Bruce W. Suter

IEEE Trans. Signal Process., 2013

A decoding algorithm with reduced complexity for non-binary LDPC codes over large fields.

Jun Lin, Zhiyuan Yan

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

Reduced-Complexity Decoders of Long Reed-Solomon Codes Based on Composite Cyclotomic Fourier Transforms.

Xuebin Wu, Zhiyuan Yan, Jun Lin

IEEE Trans. Signal Process., 2012

Efficient Kötter-Kschischang Decoder Architectures for Noncoherent Error Control in Random Linear Network Coding.

Jun Lin, Hongmei Xie, Zhiyuan Yan

Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Modified shuffled schedule for nonbinary low-density parity-check codes.

Jun Lin, Zhiyuan Yan

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2010

Flexible LDPC Decoder Design for Multigigabit-per-Second Applications.

Chuan Zhang, Zhongfeng Wang, Jin Sha, Li Li, Jun Lin

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

An Efficient VLSI Architecture for Nonbinary LDPC Decoders.

Jun Lin, Jin Sha, Zhongfeng Wang, Li Li

IEEE Trans. Circuits Syst. II Express Briefs, 2010

Efficient Decoder Design for Nonbinary Quasicyclic LDPC Codes.

Jun Lin, Jin Sha, Zhongfeng Wang, Li Li

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009

LDPC decoder design for high rate wireless personal area networks.

Jin Sha, Jun Lin, Zhongfeng Wang, Li Li, Minglun Gao

IEEE Trans. Consumer Electron., 2009

Decoder Design for RS-Based LDPC Codes.

Jin Sha, Jun Lin, Zhongfeng Wang, Li Li, Minglun Gao

IEEE Trans. Circuits Syst. II Express Briefs, 2009

Efficient Shuffle Network Architecture and Application for WiMAX LDPC Decoders.

Jun Lin, Zhongfeng Wang, Li Li, Jin Sha, Minglun Gao

IEEE Trans. Circuits Syst. II Express Briefs, 2009

An improved min-sum based column-layered decoding algorithm for LDPC codes.

Jun Lin, Jin Sha, Zhongfeng Wang, Li Li

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

LDPC Decoder Design for IEEE 802.15 Standard.

Jin Sha, Jun Lin, Li Li, Minglun Gao, Zhongfeng Wang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Low-complexity shift-LDPC decoder for high-speed communication systems.

Chuan Zhang, Li Li, Jun Lin, Zhongfeng Wang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008