Jun Jin Kong

According to our database, Jun Jin Kong authored at least 11 papers between 2000 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme.

Ki Chul Chun, Yong-Ki Kim, Yesin Ryu, Jaewon Park, Chi Sung Oh, Young-Yong Byun, So-Young Kim, Dong-Hak Shin, Jun Gyu Lee, Byung-Kyu Ho, Min-Sang Park, Seong-Jin Cho, Seunghan Woo, Byoung-Mo Moon, Beomyong Kil, Sungoh Ahn, Jae Hoon Lee, Sooyoung Kim, Seouk-Kyu Choi, Jae-Seung Jeong, Sung-Gi Ahn, Jihye Kim, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Jung-Bae Lee

IEEE J. Solid State Circuits, 2021

2020

22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme.

Chi-Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin Ryu, Jaewon Park, Sinho Kim, Sang-uhn Cha, Dong-Hak Shin, Jungyu Lee, Jong-Pil Son, Byung-Kyu Ho, Seong-Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim, Yong-Sik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook Lee, Seungseob Lee, Sooyoung Kim, Bo-Tak Lim, Seouk-Kyu Choi, Jin-Guk Kim, Hye-In Choi, Hyuk-Jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il Park, Jung-Bae Lee

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018

Efficient decoding of block turbo codes.

Jaeyong Son, Jun Jin Kong, Kyeongcheol Yang

J. Commun. Networks, 2018

2016

A post-processing algorithm for reducing strong error effects in NAND flash memory.

Sung-Rae Kim, Kijun Lee, Gyuyeol Kong, Myung-Kyu Lee, Dongmin Shin, Geunyeong Yu, Beomkyu Shin, Pilsang Yoon, Hongrak Son, Jun Jin Kong

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2013

Modulation coding for flash memories.

Yongjune Kim, B. V. K. Vijaya Kumar, Kyoung Lae Cho, Hongrak Son, Jaehong Kim, Jun Jin Kong, Jaejin Lee

Proceedings of the International Conference on Computing, Networking and Communications, 2013

2012

Verify level control criteria for multi-level cell flash memories and their applications.

Yongjune Kim, Jaehong Kim, Jun Jin Kong, B. V. K. Vijaya Kumar, Xin Li

EURASIP J. Adv. Signal Process., 2012

Error control coding and signal processing for flash memories.

Beomkyu Shin, Changkyu Seol, Jung-Soo Chung, Jun Jin Kong

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2004

Low-latency architectures for high-throughput rate Viterbi decoders.

Jun Jin Kong, Keshab K. Parhi

IEEE Trans. Very Large Scale Integr. Syst., 2004

2003

Interleaved Convolutional Code and Its Viterbi Decoder Architecture.

Jun Jin Kong, Keshab K. Parhi

EURASIP J. Adv. Signal Process., 2003

2002

High-speed add-compare-select units using locally self-resetting CMOS.

Gunok Jung, Jun Jin Kong, Gerald E. Sobelman, Keshab K. Parhi

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2000

A modified two-step SOVA-based turbo decoder with a fixed scaling factor.

Dai Won Kim, Taek Won Kwon, Jun Rim Choi, Jun Jin Kong

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000