Jun-Hong Weng

According to our database, Jun-Hong Weng authored at least 11 papers between 2006 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Design of Microstrip Multifunction Integrated Diplexers With Frequency Division, Frequency Selection, and Power Division Functions.

Chi-Feng Chen, Kai-Wei Zhou, Ruei-Yi Chen, Hsin-Ya Tseng, Yi-Hua He, Wen-Jie Li, Jun-Hong Weng

IEEE Access, 2021

2017

Realization of buck converter with adaptive variable-frequency control.

Ching-Yuan Yang, Jen-Yan Huang, Jun-Hong Weng

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

2016

Ka-band frequency synthesizer involving a varactorless LC-type voltage-controlled oscillator and phase rotation.

Jun-Hong Weng, Shen Cheng, Chih-Kai Chiu, Chih-Hsiang Chang

Microelectron. J., 2016

A high-efficiency self-oscillating Class D amplifier in 0.35-um CMOS.

Jun-Hong Weng, I-Chun Tsai, Yu-Jang Hsu

Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2016

2013

A 3.4mW 2.3-to-2.7GHz frequency synthesizer in 0.18-µm CMOS.

Chih-Hsiang Chang, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng, Nai-Chen Cheng

Proceedings of the ESSCIRC 2013, 2013

2011

A 0.5/0.8-V 9-GHz Frequency Synthesizer With Doubling Generation in 0.13-μm CMOS.

Ching-Yuan Yang, Chih-Hsiang Chang, Jun-Hong Weng, Hsin-Ming Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2011

A 5-GHz Direct Digital Frequency Synthesizer Using an Analog-Sine-Mapping Technique in 0.35- μ m SiGe BiCMOS.

Ching-Yuan Yang, Jun-Hong Weng, Hsuan-Yu Chang

IEEE J. Solid State Circuits, 2011

A low-power direct digital frequency synthesizer using an analogue-sine-conversion technique.

Jun-Hong Weng, Ching-Yuan Yang, Yi-Lin Jhu

Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

2008

A programmable duty cycle corrector based on delta-sigma modulated PWM mechanism.

Gung-Yu Lin, Ching-Yuan Yang, Yu Lee, Jun-Hong Weng

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2006

A low-noise microsensor amplifier with automatic gain control system.

Jun-Hong Weng, Chong-Jng Yu, Ching-Yuan Yang, Peng-Chang Yang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique.

Jun-Hong Weng, Meng-Ting Tsai, Jung-Mao Lin, Ching-Yuan Yang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006