Jumpei Uchida

According to our database1, Jumpei Uchida authored at least 6 papers between 2004 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2006
A Fast Elliptic Curve Cryptosystem LSI Embedding Word-Based Montgomery Multiplier.
IEICE Trans. Electron., 2006

An interface-circuit synthesis method with configurable processor core in IP-based SoC designs.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Sub-operation Parallelism Optimization in SIMD Processor Core Synthesis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Sub-operation parallelism optimization in SIMD processor synthesis and its experimental evaluations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A processor core synthesis system in IP-based SoC design.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
A thread partitioning algorithm in low power high-level synthesis.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004


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