Julian Speith

Orcid: 0000-0002-8408-8518

Affiliations:
  • Max Planck Institute for Security and Privacy (MPI-SP), Bochum, Germany


According to our database1, Julian Speith authored at least 11 papers between 2018 and 2024.

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Bibliography

2024
HAWKEYE - Recovering Symmetric Cryptography From Hardware Circuits.
IACR Cryptol. ePrint Arch., 2024

Explainability as a Requirement for Hardware: Introducing Explainable Hardware (XHW).
Proceedings of the 32nd IEEE International Requirements Engineering Conference, 2024

Stealing Maggie's Secrets-On the Challenges of IP Theft Through FPGA Reverse Engineering.
Proceedings of the 2024 on ACM SIGSAC Conference on Computer and Communications Security, 2024

2023
Evil from Within: Machine Learning Backdoors through Hardware Trojans.
CoRR, 2023

Expanding Explainability: From Explainable Artificial Intelligence to Explainable Hardware.
CoRR, 2023

2022
How Not to Protect Your IP - An Industry-Wide Break of IEEE 1735 Implementations.
Proceedings of the 43rd IEEE Symposium on Security and Privacy, 2022

2021
LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

A survey of algorithmic methods in IC reverse engineering.
J. Cryptogr. Eng., 2021

2020
Hardware-Trojaner.
Datenschutz und Datensicherheit, 2020

2019
Towards Practical Microcontroller Implementation of the Signature Scheme Falcon.
Proceedings of the Post-Quantum Cryptography - 10th International Conference, 2019

2018
Evaluation of Lattice-Based Signature Schemes in Embedded Systems.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018


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