Julian Haase

Orcid: 0000-0002-8604-0139

According to our database1, Julian Haase authored at least 13 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
NC-Library: Expanding SystemC Capabilities for Nested reConfigurable Hardware Modelling.
ACM Trans. Reconfigurable Technol. Syst., September, 2024

Network Adapter for Secure Networks-on-Chip.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

Embedded Security Accelerators within Network-on-Chip Environments.
Proceedings of the 14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2024

2023
Unlocking the Potential of RISC-V Heterogeneous MPSoC: A PANACA-Based Approach to Simulation and Modeling.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

Enhancing Robustness and Reliability of Networks-on-Chip with Network Coding.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

Virtualization of Hardware Accelerators in a Network-on-Chip.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

RTASS: a RunTime Adaptable and Scalable System for Network-on-Chip-Based Architectures.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Simulation and Modelling for Network-on-Chip Based MPSoC.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2022
PANACA: An Open-Source Configurable Network-on-Chip Simulation Platform.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Secure Communication Protocol for Network-on-Chip with Authenticated Encryption and Recovery Mechanism.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022

2021
Performance analysis of application-specific instruction-set routers in networks-on-chip.
Proceedings of the NoCArc '21: Proceedings of the 14th International Workshop on Network on Chip Architectures, Virtual Event, Greece, October 18, 2021

2018
Low Power Image Processing Applications on FPGAs Using Dynamic Voltage Scaling and Partial Reconfiguration.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

2008
FluoroSim: A Visual Problem-Solving Environment for Fluorescence Microscopy.
Proceedings of the Eurographics Workshop on Visual Computing for Biomedicine, 2008


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