Julen Gomez-Cornejo

According to our database, Julen Gomez-Cornejo authored at least 6 papers between 2013 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Data content scrubbing approach for SRAM based FPGA designs.

Julen Gomez-Cornejo, Igor Villalta, Itxaso Aranzabal, Iraide Lopez, Aitzol Zuloaga

Proceedings of the 31st IEEE International Symposium on Industrial Electronics, 2022

2018

SEU emulation in industrial SoCs combining microprocessor and FPGA.

Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jaime Jimenez, Jesús Lázaro

Reliab. Eng. Syst. Saf., 2018

2017

Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs.

Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jesús Lázaro, Armando Astarloa

Microelectron. Reliab., 2017

A novel BRAM content accessing and processing method based on FPGA configuration bitstream.

Julen Gomez-Cornejo, Aitzol Zuloaga, Igor Villalta, Javier Del Ser, Uli Kretzschmar, Jesús Lázaro

Microprocess. Microsystems, 2017

2016

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs.

Uli Kretzschmar, Julen Gomez-Cornejo, Armando Astarloa, Unai Bidarte, Javier Del Ser

Reliab. Eng. Syst. Saf., 2016

2013

Fast context reloading lockstep approach for SEUs mitigation in a FPGA soft core processor.

Julen Gomez-Cornejo, Aitzol Zuloaga, Uli Kretzschmar, Unai Bidarte, Jaime Jimenez

Proceedings of the IECON 2013, 2013