Jui-Yuan Tsai

According to our database1, Jui-Yuan Tsai authored at least 5 papers between 2013 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2016
15.6 A 160MHz-BW 72dB-DR 40mW continuous-time ΔΣ modulator in 16nm CMOS with analog ISI-reduction technique.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
A 16nm FinFet 19/39MHz 78/72dB DR noise-injected aggregated CTSDM ADC for configurable LTE advanced CCA/NCCA Application.
Proceedings of the Symposium on VLSI Circuits, 2015

2013
A background calibration technique for fully dynamic flash ADCs.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

A 28fJ/conv-step CT ΔΣ modulator with 78dB DR and 18MHz BW in 28nm CMOS using a highly digital multibit quantizer.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Service Design for Cloud Services of Dental Clinics.
Proceedings of the 19th International Conference on Distributed Multimedia Systems, 2013


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