Juan Portillo
According to our database1,
Juan Portillo
authored at least 3 papers
between 2013 and 2018.
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Bibliography
2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2016
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
2013
Variable latency VLSI design based on timing analysis, delay ATPG, and completion prediction.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013