Juan Antonio Carballo

According to our database1, Juan Antonio Carballo authored at least 14 papers between 1999 and 2016.

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Bibliography

2016
The architecture value engine: measuring and delivering sustainable SoC improvement.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2014
ITRS 2.0: Toward a re-framing of the Semiconductor Technology Roadmap.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2007
Megatrends and EDA 2017.
Proceedings of the 44th Design Automation Conference, 2007

2005
Guest Editors' Introduction: DFM Drives Changes in Design Flow.
IEEE Des. Test Comput., 2005

Open HW, Open Design SW, and the VC Ecosystem Dilemma.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

T1: Design for Manufacturability.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004
Impact of Design-Manufacturing Interface on SoC Design Methodologies.
IEEE Des. Test Comput., 2004

Requirement-based design methods for adaptive communications links.
Proceedings of the 41th Design Automation Conference, 2004

2003
Panel Summaries.
IEEE Des. Test Comput., 2003

A semi-custom voltage-island technique and its application to high-speed serial links.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

2002
Impact of Technology in Power-Grid-Induced Noise.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

2001
Application of Constraint-Based Heuristics in Collaborative Design.
Proceedings of the 38th Design Automation Conference, 2001

2000
Active design process management.
PhD thesis, 2000

1999
Constraint Management for Collaborative Electronic Design.
Proceedings of the 36th Conference on Design Automation, 1999


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