Joycee Mekie
Orcid: 0000-0001-9646-1941
According to our database1,
Joycee Mekie
authored at least 63 papers
between 2004 and 2024.
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Bibliography
2024
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error Tolerant Applications.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
COMPRIZE: Assessing the Fusion of Quantization and Compression on DNN Hardware Accelerators.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
DeepFrack: A Comprehensive Framework for Layer Fusion, Face Tiling, and Efficient Mapping in DNN Hardware Accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
Hardware-Software Co-Design of a Collaborative DNN Accelerator for 3D Stacked Memories with Multi-Channel Data.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
CANSim: When to Utilize Synchronous and Asynchronous Routers in Large and Complex NoCs.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
ACM Trans. Archit. Code Optim., June, 2023
IEEE Trans. Very Large Scale Integr. Syst., 2023
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
PIC-RAM: Process-Invariant Capacitive Multiplier Based Analog In Memory Computing in 6T SRAM.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
REDRAW: Fast and Efficient Hardware Accelerator with Reduced Reads And Writes for 3D UNet.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
A 10T, 0.22fJ/Bit/Search Mixed-V<sub>T</sub> Pseudo Precharge-Free Content Addressable Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A Fresh Perspective on DNN Accelerators by Performing Holistic Analysis Across Paradigms.
CoRR, 2022
Mixed-8T: Energy-Efficient Configurable Mixed-VT SRAM Design Techniques for Neural Networks.
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022
Impact of Operand Ordering in Approximate Multiplication in Neural Network and Image Processing Applications.
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022
RTQCC-14T: Radiation Tolerant Quadruple Cross Coupled Robust SRAM Design for Radiation Prone Environments.
Proceedings of the VLSI Design and Test - 26th International Symposium, 2022
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
An Automated Approach to Compare Bit Serial and Bit Parallel In-Memory Computing for DNNs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
RHSCC-16T: Radiation Hardened Sextuple Cross Coupled Robust SRAM Design for Radiation Prone Environments.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
2021
Analysis of Worst-Case Data Dependent Temporal Approximation in Floating Point Units.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Zero Aware Configurable Data Encoding by Skipping Transfer for Error Resilient Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Learning by Cheating : An End-to-End Zero Shot Framework for Autonomous Drone Navigation.
CoRR, 2021
CoRR, 2021
FPCAM: Floating Point Configurable Approximate Multiplier for Error Resilient Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2020
Energy and Error Analysis Framework for Approximate Computing in Mobile Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
A Mathematical Approach Towards Quantization of Floating Point Weights in Low Power Neural Networks.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
FPAD: A Multistage Approximation Methodology for Designing Floating Point Approximate Dividers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
ACM J. Emerg. Technol. Comput. Syst., 2019
Hetro8T: power and area efficient approximate heterogeneous 8T SRAM for H.264 video decoder.
IET Comput. Digit. Tech., 2019
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
Power and Area Efficient Approximate Heterogeneous 8T SRAM for Multimedia Applications.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Design of Novel CMOS Based Inexact Subtractors and Dividers for Approximate Computing: An In-Depth Comparison with PTL Based Designs.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018
Single-Error Hardened and Multiple-Error Tolerant Guarded Dual Modular Redundancy Technique.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018
2016
Proceedings of the 6th IEEE International Conference on Biomedical Robotics and Biomechatronics, 2016
2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Effect of Dynamic Frequency Scaling on Interface Design for Rationally-Related Multi-clocked Systems.
Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014
2006
Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006
2004
Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004