Josette Berger-Toussan

According to our database1, Josette Berger-Toussan authored at least 3 papers between 1988 and 1998.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

1998
FLAG: a flexible layout generator for analog MOS transistors.
IEEE J. Solid State Circuits, 1998

1994
Automatic layout generation for CMOS analog transistors.
Proceedings of the Proceedings EURO-DAC'94, 1994

1988
Un sous-système de recherche géométrique et d'équivalence pour la CAO de circuits intégrés VLSI. (Geometrical and equivalence searching sub-system for CAD of VLSI integrated circuits).
PhD thesis, 1988


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