Joseph Wang
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2016
Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
A 3D immersed finite element method with non-homogeneous interface flux jump for applications in particle-in-cell simulations of plasma-lunar surface interactions.
J. Comput. Phys., 2016
Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
2015
Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2015
SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Proceedings of the Symposium on VLSI Circuits, 2015
Transistor-interconnect mobile system-on-chip co-design method for holistic battery energy minimization.
Proceedings of the Symposium on VLSI Circuits, 2015
2010
Proceedings of the IEEE International Conference on Acoustics, 2010
2009
Proceedings of the 16th International Conference on Digital Signal Processing, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
Proceedings of the 45th Design Automation Conference, 2008
2007
2004
2002
Proceedings of the Second International Workshop on Web Dynamics, 2002