Joseph Versaggi

According to our database1, Joseph Versaggi authored at least 7 papers between 2014 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
A Physics based MTJ Compact Model for State-of-the-Art and Emerging STT-MRAM Failure Analysis and Yield Enhancement.
Proceedings of the IEEE International Memory Workshop, 2022

2020
Bias-Dependent Variation in FinFET SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
An Extrinsic Device and Leakage Mechanism in Advanced Bulk FinFET SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
A Retrospective View on the Technology Evolution to Support Low Power Mobile Application.
J. Low Power Electron., 2018

2017
Array Termination Impacts in Advanced SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Bias-Induced Healing of $V_{\text {min}}$ Failures in Advanced SRAM Arrays.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2014
HTOL SRAM Vmin shift considerations in scaled HKMG technologies.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014


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