Joseph T. Rahmeh

Simul., 1993

Evaluation of Parts by Mixed-Level DC-Connected Components in Logic Simulation.

[BibT_eX]

[DOI]

Dah-Cherng Yuan

Lawrence T. Pillage

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

Improving the Accuracy of Dynamic Branch Prediction Using Branch Correlation.

[BibT_eX]

[DOI]

Shien-Tai Pan

Kimming So

Proceedings of the ASPLOS-V Proceedings, 1992

1991

Interlock Schemes for Micropiplines: Application to a Self-Timed Rebound Sorter.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1990

Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor.

[BibT_eX]

[DOI]

Vijay Balasubramanian

IEEE Trans. Computers, 1990

Hierarchical multi-level fault simulation of large systems.

[BibT_eX]

[DOI]

J. Electron. Test., 1990

Fault grading of large digital systems.

[BibT_eX]

[DOI]

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

1989

Parallel-concurrent fault simulation.

[BibT_eX]

[DOI]

Ibrahim N. Hajj

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

Automatic Generation of Behavioral Models from Switch-Level Descriptions.

[BibT_eX]

[DOI]

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988

Measurement-Based Performance Models of Numerical Problems on Loosely-Coupled Systems

[BibT_eX]

[DOI]

PhD thesis, 1988

CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits.

[BibT_eX]

[DOI]

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor.

[BibT_eX]

[DOI]

Proceedings of the Eighteenth International Symposium on Fault-Tolerant Computing, 1988

1986

FAUST: An MOS Fault Simulator with Timing Information.

[BibT_eX]

[DOI]

Hsi-Ching Shih