Joseph R. Cavallaro

Orcid: 0000-0002-9841-1806

Affiliations:
  • Rice University, Houston, TX, USA


According to our database1, Joseph R. Cavallaro authored at least 218 papers between 1988 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2015, "For contributions to VLSI architectures and algorithms for signal processing and wireless communications".

Timeline

Legend:

Book 
In proceedings 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
Towards Receiver-Agnostic and Collaborative Radio Frequency Fingerprint Identification.
IEEE Trans. Mob. Comput., July, 2024

Message from the Conference Chairs: SiPS 2024.
Proceedings of the IEEE Workshop on Signal Processing Systemsm, 2024

2023
A Unified Parallel CORDIC-Based Hardware Architecture for LSTM Network Acceleration.
IEEE Trans. Computers, October, 2023

Design and Implementation of an FPGA-Based DNN Architecture for Real-time Outlier Detection.
J. Signal Process. Syst., July, 2023

Enabling High-Level Design Strategies for High-Throughput and Low-Power NB-LDPC Decoders.
IEEE Des. Test, February, 2023

Toward Length-Versatile and Noise-Robust Radio Frequency Fingerprint Identification.
IEEE Trans. Inf. Forensics Secur., 2023

Deep Learning System for Left Ventricular Assist Device Candidate Assessment from Electrocardiograms.
Proceedings of the Computing in Cardiology, 2023

On the Design of Reconfigurable Edge Devices for RF Fingerprint Identification (RED-RFFI) for IoT Systems.
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023

2022
Guest Editorial: Special Issue on Advances in Signal Processing Systems.
J. Signal Process. Syst., 2022

Towards Scalable and Channel-Robust Radio Frequency Fingerprint Identification for LoRa.
IEEE Trans. Inf. Forensics Secur., 2022

Special Issue on Artificial Intelligence at the Edge.
IEEE Micro, 2022

RT-RCG: Neural Network and Accelerator Search Towards Effective and Real-time ECG Reconstruction from Intracardiac Electrograms.
ACM J. Emerg. Technol. Comput. Syst., 2022

A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures.
IEEE Commun. Surv. Tutorials, 2022

e-G2C: A 0.14-to-8.31 µJ/Inference NN-based Processor with Continuous On-chip Adaptation for Anomaly Detection and ECG Conversion from EGM.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

FPGA-based DNN Hardware Accelerator for Sensor Network Aggregation Node.
Proceedings of the 56th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2022, Pacific Grove, CA, USA, October 31, 2022

2021
Radio Frequency Fingerprint Identification for Narrowband Systems, Modelling and Classification.
IEEE Trans. Inf. Forensics Secur., 2021

GPU-Based, LDPC Decoding for 5G and Beyond.
IEEE Open J. Circuits Syst., 2021

Design and Implementation of Autoencoder-LSTM Accelerator for Edge Outlier Detection.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

OFDM-Based Beam-Oriented Digital Predistortion for Massive MIMO.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Virtual DPD Neural Network Predistortion for OFDM-based MU-Massive MIMO.
Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021

Radio Frequency Fingerprint Identification for Security in Low-Cost IoT Devices.
Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021

Real-time FPGA-Based Outlier Detection using Autoencoder and LSTM.
Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021

2020
GPU-Based Linearization of MIMO Arrays.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

Pushing the Limits of Energy Efficiency for Non-Binary LDPC Decoders on GPUs and FPGAs.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

GPU-Based LDPC Decoding for vRAN Systems in 5G and Beyond.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Gbit/s Non-Binary LDPC Decoders: High-Throughput using High-Level Specifications.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Predistortion of OFDM Waveforms using Guard-band Subcarriers.
Proceedings of the 54th Asilomar Conference on Signals, Systems, and Computers, 2020

2019
Decentralized Equalization With Feedforward Architectures for Massive MU-MIMO.
IEEE Trans. Signal Process., 2019

Enabling a "Use-or-Share" Framework for PAL-GAA Sharing in CBRS Networks via Reinforcement Learning.
IEEE Trans. Cogn. Commun. Netw., 2019

Design and Implementation of a Neural Network Based Predistorter for Enhanced Mobile Broadband.
Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

Decentralized Coordinate-Descent Data Detection and Precoding for Massive MU-MIMO.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Neural Network DPD via Backpropagation through a Neural Network Model of the PA.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

Design Trade-offs for Decentralized Baseband Processing in Massive MU-MIMO Systems.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019

2018
Introduction to the Special Issue on Signal Processing Systems.
J. Signal Process. Syst., 2018

Implicit vs. Explicit Approximate Matrix Inversion for Wideband Massive MU-MIMO Data Detection.
J. Signal Process. Syst., 2018

Low-complexity, Multi Sub-band Digital Predistortion - Novel Algorithms and SDR Verification.
J. Signal Process. Syst., 2018

Guest Editorial Special Issue on the 2017 IEEE International Symposium on Circuits and Systems (ISCAS 2017).
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Energy-efficient Convolutional Neural Networks via Statistical Error Compensated Near Threshold Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Opportunistic Channel Access Using Reinforcement Learning in Tiered CBRS Networks.
Proceedings of the 2018 IEEE International Symposium on Dynamic Spectrum Access Networks, 2018

A Supply Fluctuation Resilient SRAM.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

Feedforward Architectures for Decentralized Precoding in Massive MU-MIMO Systems.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

RENEW: Programmable and Observable Massive MIMO Networks.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

An Energy Harvesting Wireless Leadless Multisite Pacemaker Prototype.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018

2017
Parallel Digital Predistortion Design on Mobile GPU and Embedded Multicore CPU for Mobile Transmitters.
J. Signal Process. Syst., 2017

A Context-Aware Trust Framework for Resilient Distributed Cooperative Spectrum Sensing in Dynamic Settings.
IEEE Trans. Veh. Technol., 2017

Decentralized Baseband Processing for Massive MU-MIMO Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2017

On the achievable rates of decentralized equalization in massive MU-MIMO systems.
Proceedings of the 2017 IEEE International Symposium on Information Theory, 2017

Multi component carrier, sub-band DPD and GNURadio implementation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Digital predistortion with low-precision ADCs.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

A low-power digital ASIC for detecting heart-rate and missing beat.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

Decentralized equalization for massive MU-MIMO on FPGA.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

Real-time, data-driven system to learn parameters for multisite pacemaker beat detection.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

2016
Indoor Localization Using 802.11 Time Differences of Arrival.
IEEE Trans. Instrum. Meas., 2016

Trust-Aware Consensus-Inspired Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks.
IEEE Trans. Cogn. Commun. Netw., 2016

High-Throughput Data Detection for Massive MU-MIMO-OFDM Using Coordinate Descent.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Low-Complexity Sub-band Digital Predistortion for Spurious Emission Suppression in Noncontiguous Spectrum Access.
CoRR, 2016

Low-Complexity, Sub-Band DPD with Sequential Learning: Novel Algorithms and WARPLab Implementation.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

FPGA design of a coordinate descent data detector for large-scale MU-MIMO.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Decentralized beamforming for massive MU-MIMO on a GPU cluster.
Proceedings of the 2016 IEEE Global Conference on Signal and Information Processing, 2016

On spatial security outage probability derivation of exposure region based beamforming with randomly located eavesdroppers.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2016

Decentralized data detection for massive MU-MIMO on a Xeon Phi cluster.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Parameterized Sets of Dataflow Modes And Their Application to Implementation of Cognitive Radio Systems.
J. Signal Process. Syst., 2015

Decision-Directed Channel Estimation Implementation for Spectral Efficiency Improvement in Mobile MIMO-OFDM.
J. Signal Process. Syst., 2015

VLSI design of large-scale soft-output MIMO detection using conjugate gradients.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Scale- and orientation-invariant keypoints in higher-dimensional data.
Proceedings of the 2015 IEEE International Conference on Image Processing, 2015

Robust Consensus-Based Cooperative Spectrum Sensing under Insistent Spectrum Sensing Data Falsification Attacks.
Proceedings of the 2015 IEEE Global Communications Conference, 2015

Mobile GPU accelerated digital predistortion on a software-defined mobile transmitter.
Proceedings of the 2015 IEEE Global Conference on Signal and Information Processing, 2015

The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

Sub-band digital predistortion for noncontiguous transmissions: Algorithm development and real-time prototype implementation.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

2014
GPU Acceleration of a Configurable N-Way MIMO Detector for Wireless Systems.
J. Signal Process. Syst., 2014

Computer Vision Accelerators for Mobile Systems based on OpenCL GPGPU Co-Processing.
J. Signal Process. Syst., 2014

Parallel Interleaver Design for a High Throughput HSPA+/LTE Multi-Standard Turbo Decoder.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Large-Scale MIMO Detection for 3GPP LTE: Algorithms and FPGA Implementations.
IEEE J. Sel. Top. Signal Process., 2014

A 3.8Gb/s large-scale MIMO detector for 3GPP LTE-Advanced.
Proceedings of the IEEE International Conference on Acoustics, 2014

Efficient architecture mapping of FFT/IFFT for cognitive radio networks.
Proceedings of the IEEE International Conference on Acoustics, 2014

Parallel programming of a symmetric transport-triggered architecture with applications in flexible LDPC encoding.
Proceedings of the IEEE International Conference on Acoustics, 2014

Low power implementation of digital predistortion filter on a heterogeneous application specific multiprocessor.
Proceedings of the IEEE International Conference on Acoustics, 2014

Conjugate gradient-based soft-output detection and precoding in massive MIMO systems.
Proceedings of the IEEE Global Communications Conference, 2014

A cooperative spectrum sensing scheme for cognitive radio ad hoc networks based on gossip and trust.
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014

Iterative detection and decoding in 3GPP LTE-based massive MIMO systems.
Proceedings of the 22nd European Signal Processing Conference, 2014

Low-complexity digital predistortion for reducing power amplifier spurious emissions in spectrally-agile flexible radio.
Proceedings of the 9th International Conference on Cognitive Radio Oriented Wireless Networks and Communications, 2014

Investigation of secure wireless regions using configurable beamforming on WARP.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

High-throughput DOCSIS upstream QC-LDPC decoder.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

A high performance GPU-based software-defined basestation.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

On the performance of LDPC and turbo decoder architectures with unreliable memories.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2013
Application-Specific Accelerators for Communications.
Proceedings of the Handbook of Signal Processing Systems, 2013

VLSI Architecture for Layered Decoding of QC-LDPC Codes With High Circulant Weight.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Approximate matrix inversion for high-throughput data detection in the large-scale MIMO uplink.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Parallel interleaver architecture with new scheduling scheme for high throughput configurable turbo decoder.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Implementation trade-offs for linear detection in large-scale MIMO systems.
Proceedings of the IEEE International Conference on Acoustics, 2013

Accelerating computer vision algorithms using OpenCL framework on the mobile GPU - A case study.
Proceedings of the IEEE International Conference on Acoustics, 2013

A fast and efficient sift detector using the mobile GPU.
Proceedings of the IEEE International Conference on Acoustics, 2013

High-throughput beamforming receiver for millimeter wave mobile communication.
Proceedings of the 2013 IEEE Global Communications Conference, 2013

High throughput low latency LDPC decoding on GPU for SDR systems.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Workload analysis and efficient OpenCL-based implementation of SIFT algorithm on a smartphone.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Subcarrier allocation and power control with LTE-A carrier aggregation.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Dataflow modeling and design for cognitive radio networks.
Proceedings of the 8th International Conference on Cognitive Radio Oriented Wireless Networks, 2013

Highly scalable on-the-fly interleaved address generation for UMTS/HSPA+ parallel turbo decoder.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

Full-duplex in large-scale wireless systems.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

HSPA;/LTE-A turbo decoder on GPU and multicore CPU.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

Mobile transmitter digital predistortion: Feasibility analysis, algorithms and design exploration.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012
High-Throughput Soft-Output MIMO Detector Based on Path-Preserving Trellis-Search Algorithm.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Trellis-Search Based Soft-Input Soft-Output MIMO Detector: Algorithm and VLSI Architecture.
IEEE Trans. Signal Process., 2012

Parallel Searching-Based Sphere Detector for MIMO Downlink OFDM Systems.
IEEE Trans. Signal Process., 2012

Flexible N-Way MIMO Detector on GPU.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Reconfigurable multi-standard uplink MIMO receiver with partial interference cancellation.
Proceedings of IEEE International Conference on Communications, 2012

Baseband signal compression in wireless base stations.
Proceedings of the 2012 IEEE Global Communications Conference, 2012

GPU-based acceleration of symbol timing recovery.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Low complexity opportunistic decoder for network coding.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Parallel nonbinary LDPC decoding on GPU.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Implementation of LS, MMSE and SAGE channel estimators for mobile MIMO-OFDM.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Session TP5a: Design methodologies and architectures for communications.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

2011
Implementation of a High Throughput 3GPP Turbo Decoder on GPU.
J. Signal Process. Syst., 2011

Implementation of a High Throughput Soft MIMO Detector on GPU.
J. Signal Process. Syst., 2011

A Flexible LDPC/Turbo Decoder Architecture.
J. Signal Process. Syst., 2011

A High Throughput Configurable SDR Detector for Multi-user MIMO Wireless Systems.
J. Signal Process. Syst., 2011

Architecture Design and Implementation of the Metric First List Sphere Detector Algorithm.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Cooperative Partial Detection Using MIMO Relays.
IEEE Trans. Signal Process., 2011

Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder.
Integr., 2011

A massively parallel implementation of QC-LDPC decoder on GPU.
Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011

Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

High-throughput Contention-Free concurrent interleaver architecture for multi-standard turbo decoder.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

GPU accelerated scalable parallel decoding of LDPC codes.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010
Performance: complexity comparison of receivers for a LTE MIMO-OFDM system.
IEEE Trans. Signal Process., 2010

Implementation aspects of list sphere decoder algorithms for MIMO-OFDM systems.
Signal Process., 2010

Low-complexity and high-performance soft MIMO detection based on distributed M-algorithm through trellis-diagram.
Proceedings of the IEEE International Conference on Acoustics, 2010

Physical layer algorithm and hardware verification of MIMO relays using cooperative partial detection.
Proceedings of the IEEE International Conference on Acoustics, 2010

Programming high performance signal processing systems in high level languages.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010


Application-Specific Accelerators for Communications.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Probabilistically bounded soft sphere detection for MIMO-OFDM receivers: algorithm and system architecture.
IEEE J. Sel. Areas Commun., 2009

Scalable and low power LDPC decoder design using high level algorithmic synthesis.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

A GPU implementation of a real-time MIMO detector.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Architecture design and implementation of the increasing radius - List sphere detector algorithm.
Proceedings of the IEEE International Conference on Acoustics, 2009

High throughput VLSI architecture for soft-output mimo detection based on a greedy graph algorithm.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

Partial detection for multiple antenna cooperation.
Proceedings of the 43rd Annual Conference on Information Sciences and Systems, 2009

2008
Communication Processors for Wireless Systems.
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008

Configurable LDPC Decoder Architectures for Regular and Irregular Codes.
J. Signal Process. Syst., 2008

Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers.
Int. J. Embed. Syst., 2008

Cooperative Communications Using Scalable, Medium Block-length LDPC Codes.
Proceedings of the WCNC 2008, IEEE Wireless Communications & Networking Conference, March 31 2008, 2008

A low-power 1-Gbps reconfigurable LDPC decoder design for multiple 4G wireless standards.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Unified decoder architecture for LDPC/turbo codes.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Design of block-structured LDPC codes for iterative receivers with soft sphere detection.
Proceedings of the IEEE International Conference on Acoustics, 2008

QRD-QLD Searching Based Sphere Detection for Emerging MIMO Downlink OFDM Receivers.
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

Novel Sort-Free Detector with Modified Real-Valued Decomposition (M-RVD) Ordering in MIMO Systems.
Proceedings of the Global Communications Conference, 2008. GLOBECOM 2008, New Orleans, LA, USA, 30 November, 2008

Adaptive codebook for beamforming in limited feedback MIMO systems.
Proceedings of the 42nd Annual Conference on Information Sciences and Systems, 2008

Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

Implementation and complexity analysis of list sphere detector for MIMO-OFDM systems.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

ASIC implementation comparison of SIC and LSD receivers for MIMO-OFDM.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

Design and architecture of spatial multiplexing MIMO decoders for FPGAs.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

Session TA5b: Communication architectures.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

A new MIMO detector architecture based on a Forward-Backward trellis algorithm.
Proceedings of the 42nd Asilomar Conference on Signals, Systems and Computers, 2008

2007
Special Issue on ASAP 2004 Conference.
J. VLSI Signal Process., 2007

Structured Parallel Architecture for Displacement MIMO Kalman Equalizer in CDMA Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

A List Sphere Detector based on Dijkstra's Algorithm for MIMO-OFDM Systems.
Proceedings of the IEEE 18th International Symposium on Personal, 2007

WARP, a Unified Wireless Network Testbed for Education and Research.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

VLSI Decoder Architecture for High Throughput, Variable Block-size and Multi-rate LDPC Codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Implementation Aspects of List Sphere Detector Algorithms.
Proceedings of the Global Communications Conference, 2007

2006
A Low Complexity and Low Power SoC Design Architecture for Adaptive MAI Suppression in CDMA Systems.
J. VLSI Signal Process., 2006

Truncated Online Arithmetic with Applications to Communication Systems.
IEEE Trans. Computers, 2006

Special Issue on Reconfigurable Radio Technologies in Support of Ubiquitous Seamless Computing.
Mob. Networks Appl., 2006

Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology.
EURASIP J. Embed. Syst., 2006

An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture.
EURASIP J. Adv. Signal Process., 2006

Multi-Rate High-Throughput LDPC Decoder: Tradeoff Analysis Between Decoding Throughput and Area.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

Comparison of Two Novel List Sphere Detector Algorithms for MIMO-OFDM Systems.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

High-throughput multi-rate LDPC decoder based on architecture-oriented parity check matrices.
Proceedings of the 14th European Signal Processing Conference, 2006

Configurable, High Throughput, Irregular LDPC Decoder Architecture: Tradeoff Analysis and Implementation.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005
Low-complexity iterative multiuser detection and decoding for real-time applications.
IEEE Trans. Wirel. Commun., 2005

Fault residual generation via nonlinear analytical redundancy.
IEEE Trans. Control. Syst. Technol., 2005

An FPGA-Based Daughtercard for TI's C6000 family of DSKs.
Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005

FFT-accelerated iterative MIMO chip equalizer architecture for CDMA downlink.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

Displacement MIMO Kalman equalizer for CDMA downlink in fast fading channels.
Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005

2004
Design Space Exploration for Real-Time Embedded Stream Processors.
IEEE Micro, 2004

Semi-Parallel Reconfigurable Architectures for Real-Time LDPC Decoding.
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'04), 2004

Low complexity System-on-Chip architectures of Parallel-Residue-Compensation in CDMA systems.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Efficient MIMO equalization for downlink multi-code CDMA: complexity optimization and comparative study.
Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004

Chip-level LMMSE equalization for downlink MIMO CDMA in fast fading environments.
Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004

2003
A Rapid Prototyping Environment for Wireless Communication Embedded Systems.
EURASIP J. Adv. Signal Process., 2003

Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA.
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003

VALID: Custom ASIC Verification and FPGA Education Platform.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

Viturbo: a reconfigurable architecture for Viterbi and turbo decoding.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2002
Architectures for Heterogeneous Multi-Tier Networks.
Wirel. Pers. Commun., 2002

VLSI Implementation of the Multistage Detector for Next Generation Wideband CDMA Receivers.
J. VLSI Signal Process., 2002

Efficient VLSI Architectures for Multiuser Channel Estimation in Wireless Base-Station Receivers.
J. VLSI Signal Process., 2002

Real-time algorithms and architectures for multiuser channel estimation and detection in wireless base-station receivers.
IEEE Trans. Wirel. Commun., 2002

Handset detector architectures for DS-CDMA wireless systems.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A novel adaptive pre-distorter using LS estimation of SSPA non-linearity in mobile OFDM systems.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Post-compensation of RF non-linearity in mobile OFDM systems by estimation of memory-less polynomial.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Robotic Fault Detection using Nonlinear Analytical Redundancy.
Proceedings of the 2002 IEEE International Conference on Robotics and Automation, 2002

2001
Multitier Wireless Communications.
Wirel. Pers. Commun., 2001

On multipath channel estimation for CDMA systems using multiple sensors.
IEEE Trans. Commun., 2001

Evaluating the reliability of prototype degradable systems.
Reliab. Eng. Syst. Saf., 2001

A bit-streaming, pipelined multiuser detector for wireless communication receivers.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

VLSI implementation of Mallat's fast discrete wavelet transform algorithm with reduced complexity.
Proceedings of the Global Telecommunications Conference, 2001

On-line Arithmetic for Detection in Digital Communication Receivers.
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001

2000
Maximum weight basis decoding of convolutional codes.
Proceedings of the Global Telecommunications Conference, 2000. GLOBECOM 2000, San Francisco, CA, USA, 27 November, 2000

Efficient VLSI Architectures for Baseband Signal Processing in Wireless Base-Station Receivers.
Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000

1999
Efficient multiuser receivers for CDMA systems.
Proceedings of the 1999 IEEE Wireless Communications and Networking Conference, 1999

Keeping the Analog Genie in the Bottle: A Case for Digital Robots.
Proceedings of the 1999 IEEE International Conference on Robotics and Automation, 1999

1998
Subspace-based tracking of multipath channel parameters for CDMA systems.
Eur. Trans. Telecommun., 1998

Maximum likelihood multipath channel parameter estimation in CDMA systems using antenna arrays.
Proceedings of the 9th IEEE International Symposium on Personal, 1998

Fixed point error analysis of multiuser detection and synchronization algorithms for CDMA communication systems.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

1997
Tracking fading multipath channel parameters, in CDMA systems, using a subspace-based method-an implementation perspective.
Proceedings of the 8th IEEE International Symposium on Personal, 1997

Computationally efficient multiuser detectors.
Proceedings of the 8th IEEE International Symposium on Personal, 1997

Solving the SVD updating problem for subspace tracking on a fixed sized linear array of processors.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Efficient Implementation of Rotation Operations for High Performance QRD-RLS Filtering.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997

1995
A dynamic fault tolerance framework for remote robots.
IEEE Trans. Robotics Autom., 1995

1994
Redundant and On-Line CORDIC for Unitary Transformations.
IEEE Trans. Computers, 1994

Parallel VLSI architectures for real-time kinematics of redundant robots.
J. Intell. Robotic Syst., 1994

New Dynamic Model-Based Fault Detection Thresholds for Robot Manipulators.
Proceedings of the 1994 International Conference on Robotics and Automation, 1994

1993
Numerical Accuracy and Hardware Tradeoffs for CORDIC Arithmetic for Special-Purpose Processors.
IEEE Trans. Computers, 1993

Simulation of Systolic Arrays on the Connection Machine.
Simul., 1993

Layered Dynamic Fault Detection and Tolerance for Robots.
Proceedings of the 1993 IEEE International Conference on Robotics and Automation, 1993

Efficient complex matrix transformations with CORDIC.
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993

1991
New Real-Time Robot Motion Algorithms Using Parallel VLSI Architectures.
Proceedings of the Fifth SIAM Conference on Parallel Processing for Scientific Computing, 1991

1989
Fault-tolerant VLSI processor array for the SVD.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1988
CORDIC Arithmetic for an SVD Processor.
J. Parallel Distributed Comput., 1988

Floating point CORDIC for matrix computations.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988


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