Joseph Pusdesris

According to our database, Joseph Pusdesris authored at least 5 papers between 2012 and 2020.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2020

The Arm Neoverse N1 Platform: Building Blocks for the Next-Gen Cloud-to-Edge Infrastructure SoC.

Andrea Pellegrini, Ashok Kumar Tummala, Jamshed Jalal, Mark Werkheiser, Anitha Kona, Nigel Stephens, Magnus Bruce, Yasuo Ishii, Joseph Pusdesris, Abhishek Raja, Chris Abernathy, Jinson Koppanalil, Tushar Ringe

IEEE Micro, 2020

2019

Temporal Prefetching Without the Off-Chip Metadata.

Hao Wu, Krishnendra Nathella, Joseph Pusdesris, Dam Sunwoo, Akanksha Jain, Calvin Lin

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2014

Sources of error in full-system simulation.

Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge, Chander Sudanthi, Christopher D. Emmons, Mitchell Hayenga, Nigel C. Paver

Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014

A memory rename table to reduce energy and improve performance.

Joseph Pusdesris, Benjamin VanderSloot, Trevor N. Mudge

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2012

Lazy cache invalidation for self-modifying codes.

Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge

Proceedings of the 15th International Conference on Compilers, 2012