Joseph Paturel

Orcid: 0009-0008-6120-2147

According to our database1, Joseph Paturel authored at least 5 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Lightweight Hardware-Based Cache Side-Channel Attack Detection for Edge Devices (Edge-CaSCADe).
ACM Trans. Embed. Comput. Syst., July, 2024

2023
SmolPhone: a smartphone with energy limits.
Proceedings of the 14th International Green and Sustainable Computing Conference, 2023

2022
Functional and Timing Implications of Transient Faults in Critical Systems.
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

2020
Fast Cross-Layer Vulnerability Analysis of Complex Hardware Designs.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

2019
What You Simulate Is What You Synthesize: Designing a Processor Core from C++ Specifications.
Proceedings of the International Conference on Computer-Aided Design, 2019


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