Joseph Huang
According to our database1,
Joseph Huang
authored at least 6 papers
between 1998 and 2023.
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Bibliography
2023
2017
Proceedings of the 2017 IEEE International Conference on Bioinformatics and Biomedicine, 2017
2011
Proceedings of the IEEE International Conference on Robotics and Automation, 2011
2005
A 90-nm FPGA I/O buffer design with 1.6-Gb/s data rate for source-synchronous system and 300-MHz clock rate for external memory interface.
IEEE J. Solid State Circuits, 2005
2004
A 90 nm FPGA I/O buffer design with 1.6 Gbps data rate for source-synchronous system and 300 MHz clock rate for external memory interface.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
1998
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998