Josep Balasch
Orcid: 0000-0002-6066-8710
According to our database1,
Josep Balasch
authored at least 37 papers
between 2010 and 2024.
Collaborative distances:
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Bibliography
2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
Proceedings of the 34th IEEE International Workshop on Machine Learning for Signal Processing, 2024
Proceedings of the 35th IEEE International Conference on Application-specific Systems, 2024
2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic Circuits.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2021
ACM J. Emerg. Technol. Comput. Syst., 2021
2020
Side-channel countermeasures utilizing dynamic logic reconfiguration: Protecting AES/Rijndael and Serpent encryption in hardware.
Microprocess. Microsystems, 2020
J. Cryptogr. Eng., 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
Proceedings of the Smart Card Research and Advanced Applications, 2019
2018
IEEE Trans. Inf. Forensics Secur., 2018
The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators.
Proceedings of the 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2018
Proceedings of the 12th European Workshop on Microelectronics Education, 2018
Design and testing methodologies for true random number generators towards industry certification.
Proceedings of the 23rd IEEE European Test Symposium, 2018
An In-Depth and Black-Box Characterization of the Effects of Laser Pulses on ATmega328P.
Proceedings of the Smart Card Research and Advanced Applications, 2018
2017
2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2016
Proceedings of the Smart Card Research and Advanced Applications, 2016
2015
ACM Trans. Embed. Comput. Syst., 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
Implementation Aspects of Security and Privacy in Embedded Design (Beveiliging en privacy in ingebedde systemen: implementatieaspecten).
PhD thesis, 2014
IACR Cryptol. ePrint Arch., 2014
2013
IEEE Trans. Educ., 2013
2012
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices.
IACR Cryptol. ePrint Arch., 2012
Proceedings of the 21th USENIX Security Symposium, Bellevue, WA, USA, August 8-10, 2012, 2012
Proceedings of the Topics in Cryptology - CT-RSA 2012 - The Cryptographers' Track at the RSA Conference 2012, San Francisco, CA, USA, February 27, 2012
Proceedings of the Advances in Cryptology - ASIACRYPT 2012, 2012
2011
A Privacy-Preserving Buyer-Seller Watermarking Protocol Based on Priced Oblivious Transfer.
IEEE Trans. Inf. Forensics Secur., 2011
IEEE Trans. Dependable Secur. Comput., 2011
An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs.
Proceedings of the 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2011
2010
Proceedings of the 19th USENIX Security Symposium, 2010
Proceedings of the Design, Automation and Test in Europe, 2010