Josef Eckmüller

According to our database, Josef Eckmüller authored at least 7 papers between 1998 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Electronic System Level Power and Performance Analysis for Multi-Processor-System-on-Chip.

Muhammad Mudussir Ayub, Habibullah Ahmadzay, Josef Eckmüller, Franz Kreupl

Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

2007

From algorithm to first 3.5G call in record time: a novel system design approach based on virtual prototyping and its consequences for interdisciplinary system design teams.

M. Brandenburg, A. Schöllhorn, S. Heinen, Josef Eckmüller, T. Eckart

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2001

The Sizing Rules Method for Analog Integrated Circuit Design.

Helmut E. Graeb, Stephan Zizala, Josef Eckmüller, Kurt Antreich

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

2000

WiCkeD: analog circuit synthesis incorporating mismatch.

Kurt Antreich, Josef Eckmüller, Helmut Graeb, Michael Pronath, Frank Schenkel, Robert Schwencker, Stephan Zizala

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints.

Robert Schwencker, Josef Eckmüller, Helmut E. Graeb, Kurt Antreich

Proceedings of the 1999 Design, 1999

1998

Fast calculation of analog circuits' feasibility regions by low level functional measures.

Stephan Zizala, Josef Eckmüller, Helmut Gräb

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Hierarchical Characterization of Analog Integrated CMOS Circuits.

Josef Eckmüller, Martin Groepl, Helmut E. Graeb

Proceedings of the 1998 Design, 1998