José Vicente Calvano
According to our database1,
José Vicente Calvano
authored at least 17 papers
between 2000 and 2007.
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Bibliography
2007
Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis.
J. Electron. Test., 2007
2006
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Using Swarm Intelligence to Solve Some Analog Test Issues.
Proceedings of the 7th Latin American Test Workshop, 2006
2005
Proceedings of the 2005 Design, 2005
2004
ATPG for fault diagnosis on analog electrical networks using evolutionary techniques.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
2003
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003
2002
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
State Model Approach for Analog Fault Modeling.
Proceedings of the 3rd Latin American Test Workshop, 2002
Designing for Test Butterworth and Chebyshev Low-Pass Filters of Any Order.
Proceedings of the 3rd Latin American Test Workshop, 2002
2001
J. Electron. Test., 2001
Filter Sensitivity Analysis Using the TRAM.
Proceedings of the 2nd Latin American Test Workshop, 2001
Designing Testable Networks for Transfer Function Realization.
Proceedings of the 2nd Latin American Test Workshop, 2001
2000
Fault Detection Methodology and BIST Method for 2nd Order Butterworth, Chebyshev and Bessel Filter Approximations.
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
The Use of Macromodels on Op-Amp Circuits Fault Modeling.
Proceedings of the 1st Latin American Test Workshop, 2000
Mixed-Signal Test Bus IEEE 1149.4 Compatible BIST Scheme for Classical 2nd Order Filter Approximations using the Transient Response Analysis Method.
Proceedings of the 1st Latin American Test Workshop, 2000
Testing a PWM circuit using functional fault models and compact test vectors for operational amplifiers.
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000