José Silva Matos

According to our database, José Silva Matos authored at least 23 papers between 1992 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Scalable hardware architecture for disparity map computation and object location in real-time.

Pedro Miguel Salgueiro dos Santos, João Canas Ferreira, José Silva Matos

J. Real Time Image Process., 2016

2015

MICPRO DSD 2014 special issue.

Francesco Leporati, José Silva Matos

Microprocess. Microsystems, 2015

2014

MICPRO DSD 2013 Special Issue.

José Silva Matos, Francesco Leporati

Microprocess. Microsystems, 2014

2005

A processor for testing mixed-signal cores in System-on-Chip.

Francisco Duarte, José Machado da Silva, José Carlos Alves, G. A. Pinho, José Silva Matos

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004

A Development Support System for Applications That Use Dynamically Reconfigurable Hardware.

João Canas Ferreira, José Silva Matos

Proceedings of the Field Programmable Logic and Application, 2004

2001

ADC testing using joint time-frequency analysis.

Hélio Sousa Mendonça, José Machado da Silva, José Silva Matos

Comput. Stand. Interfaces, 2001

2000

Mixed-Signal BIST Using Correlation and Reconfigurable Hardware.

José Machado da Silva, J. Soeiro Duarte, José Silva Matos

Proceedings of the 2000 Design, 2000

1999

FAFNER-Accelerating Nesting Problems with FPGAs.

José Carlos Alves, João Canas Ferreira, C. Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998

Computer Organisation, Programming and Benchmarking - Introduction.

José Silva Matos

Proceedings of the Vector and Parallel Processing, 1998

Mixed-Signal Board Level DfT Techniques Using IEEE P1149.4.

José Silva Matos, José Machado da Silva

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Mixed hardware/software applications on dynamically reconfigurable hardware.

João Canas Ferreira, José Silva Matos

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Flexible hardware acceleration for nesting problems.

João Canas Ferreira, José Carlos Alves, Célio Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A Prototype System for Rapid Application Development using Dynamically Reconfigurable Hardware.

João Canas Ferreira, José Silva Matos

Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

RVC - A Reconfigurable Coprocessor for Vector Processing Applications.

José Carlos Alves, José Silva Matos

Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997

Implementation of Mixed Current/Voltage Testing Using the IEEE P1149.4 Infrastructure.

José Machado da Silva, Ana C. Leão, José Silva Matos, José Carlos Alves

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

A vector architecture for higher-order moments estimation.

José Carlos Alves, André T. Puga, Luís Corte-Real, José Silva Matos

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1996

Mixed current/voltage observation towards effective testing of analog and mixed-signal circuits.

José Machado da Silva, José Silva Matos, Ian M. Bell, Gaynor E. Taylor

J. Electron. Test., 1996

ProHos-1 - A Vector Processor for the Efficient Estimation of Higher-Order Moments.

José Carlos Alves, André T. Puga, Luís Corte-Real, José Silva Matos

Proceedings of the Vector and Parallel Processing, 1996

Evaluation of iDD/vOUT Cross-Correlation for Mixed Current/Voltage Testing of Analogue and Mixed-Signal Circuits.

José Machado da Silva, José Silva Matos

Proceedings of the 1996 European Design and Test Conference, 1996

1994

Architecture of test support ICs for mixed-signal testing.

José Silva Matos, João Canas Ferreira, Ana C. Leão, José Machado da Silva

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

An Approach to Testability Improvement of Mixed-Signal Boards.

José Silva Matos, João Canas Ferreira, Ana C. Leão, José Machado da Silva

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993

Control and Observation of Analog Nodes in Mixed-Signal Boards.

José Silva Matos, Ana C. Leão, João Canas Ferreira

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992

A Boundary Scan Test Controller for Hierarchical BIST.

José M. M. Ferreira, Filipe S. Pinto, José Silva Matos

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992