Jose Maria Bermudo Mera
Orcid: 0000-0003-0457-5728
According to our database1,
Jose Maria Bermudo Mera
authored at least 23 papers
between 2017 and 2025.
Collaborative distances:
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Bibliography
2025
Scabbard: An Exploratory Study on Hardware Aware Design Choices of Learning with Rounding-based Key Encapsulation Mechanisms.
ACM Trans. Embed. Comput. Syst., January, 2025
2024
Side-channel Analysis of Lattice-based Post-quantum Cryptography: Exploiting Polynomial Multiplication.
ACM Trans. Embed. Comput. Syst., March, 2024
cuFE: High Performance Privacy Preserving Support Vector Machine With Inner-Product Functional Encryption.
IEEE Trans. Emerg. Top. Comput., 2024
Proceedings of the 2024 Workshop on Attacks and Solutions in Hardware Security, 2024
2023
A 334 μW 0.158 mm<sup>2</sup> ASIC for Post-Quantum Key-Encapsulation Mechanism Saber With Low-Latency Striding Toom-Cook Multiplication.
IEEE J. Solid State Circuits, 2023
Area-Time Efficient Implementation of NIST Lightweight Hash Functions Targeting IoT Applications.
IEEE Internet Things J., 2023
A 334µW 0.158mm2 ASIC for Post-Quantum Key-Encapsulation Mechanism Saber with Low-latency Striding Toom-Cook Multiplication Extended Version.
IACR Cryptol. ePrint Arch., 2023
A 334μW 0.158mm<sup>2</sup> ASIC for Post-Quantum Key-Encapsulation Mechanism Saber with Low-latency Striding Toom-Cook Multiplication Authors Version.
CoRR, 2023
2022
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022
DPCrypto: Acceleration of Post-Quantum Cryptography Using Dot-Product Instructions on GPUs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A 334uW 0.158mm<sup>2</sup> Saber Learning with Rounding based Post-Quantum Crypto Accelerator.
CoRR, 2022
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021
IACR Cryptol. ePrint Arch., 2021
DPCrypto: Acceleration of Post-quantum Cryptographic Algorithms using Dot-Product Instruction on GPUs.
IACR Cryptol. ePrint Arch., 2021
2020
Time-memory trade-off in Toom-Cook multiplication: an application to module-lattice based cryptography.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020
Compact domain-specific co-processor for accelerating module lattice-based key encapsulation mechanism.
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the Smart Card Research and Advanced Applications, 2020
2019
2018
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018
2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017