José Manuel Martins Ferreira

According to our database, José Manuel Martins Ferreira authored at least 14 papers between 1993 and 2023.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2023

Improving the learning effectiveness of educational videos.

Fahim A. Salim, José Manuel Martins Ferreira

Proceedings of the IEEE Global Engineering Education Conference, 2023

2022

An Innovative Course Delivery Model for Industry-Master Programs - Presentation of a Case-Study at the University of South-Eastern Norway.

José Manuel Martins Ferreira

Proceedings of the IEEE Global Engineering Education Conference, 2022

2020

Use of XR technologies to bridge the gap between Higher Education and Continuing Education.

José Manuel Martins Ferreira, Zain Imtiaz Qureshi

Proceedings of the 2020 IEEE Global Engineering Education Conference, 2020

2008

A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures.

André V. Fidalgo, Gustavo R. Alves, Manuel G. Gericota, José Manuel Martins Ferreira

Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

2002

On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs.

Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José Manuel Martins Ferreira

Proceedings of the Field-Programmable Logic and Applications, 2002

Collaborative Learning in a Web-Accessible Workbench.

José Manuel Martins Ferreira, Gustavo R. Alves, Ricardo Costa, Nick A. Hine

Proceedings of the Groupware: Design, Implementation and Use, 8th International Workshop, 2002

2000

Implementing a Self-Checking PROFIBUS Slave.

Margrit Reni Krug, Marcelo Lubaszewski, José Manuel Martins Ferreira, Gustavo Ribeiro da Costa Alves

Proceedings of the 1st Latin American Test Workshop, 2000

1999

From Design-for-Test to Design-for-Debug-and-Test: Analysis of Requirements and Limitations for 1149.1.

Gustavo R. Alves, José Manuel Martins Ferreira

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

A system verification strategy based on the BST infrastructure.

Gustavo R. Alves, José Manuel Martins Ferreira

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Board-level prototype validation: a built-in controller and extended BST architecture.

Gustavo R. Alves, Tito G. B. Amaral, José Manuel Martins Ferreira

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Using the BS register for capturing and storing n-bit sequences in real-time.

Gustavo Ribeiro Alves, José Manuel Martins Ferreira

Proceedings of the 4th European Test Workshop, 1999

1998

Fault-tolerance: new trends for digital circuits.

Jose Miguel Vieira dos Santos, José Manuel Martins Ferreira

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1993

BIST for 1149.1-Compatible Boards: A Low-Cost and Maximum-Flexibility Solution.

José Manuel Martins Ferreira, Manuel G. Gericota, José L. Ramalho, Gustavo R. Alves

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

An HDL approach to board-level BIST.

Gustavo R. Alves, Manuel G. Gericota, José L. Ramalho, José Manuel Martins Ferreira

Proceedings of the European Design Automation Conference 1993, 1993