José M. Solana

According to our database, José M. Solana authored at least 5 papers between 1995 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A high-throughput ASIC processor for 8×8 transform coding in H.264/AVC.

Juan A. Michell, José M. Solana, Gustavo A. Ruiz

Signal Process. Image Commun., 2011

2009

Reducing test application time, test data volume and test power through Virtual Chain Partition.

José M. Solana

Integr., 2009

2007

Compases: an Optimized Design for Testability Scheme to Reduce the Cost of Test Application Using Parallel-Serial Scan Design.

José M. Solana

J. Circuits Syst. Comput., 2007

Haar wavelet based processor scheme for image coding with low circuit complexity.

F. Javier Díaz, Angel M. Burón, José M. Solana

Comput. Electr. Eng., 2007

1995

Fully pipelined TSPC barrel shifter for high-speed applications.

R. Pereira, Juan A. Michell, José M. Solana

IEEE J. Solid State Circuits, June, 1995