José M. Ferreira

According to our database1, José M. Ferreira authored at least 15 papers between 2001 and 2012.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

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Bibliography

2012
Gatewaying IEEE 1149.1 and IEEE 1149.7 test access ports.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

2007
On-Line Self-Healing of Circuits Implemented on Reconfigurable FPGAs.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

A Framework for Self-Healing Radiation-Tolerant Implementations on Reconfigurable FPGAs.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006
Using NEXUS compliant debuggers for real time fault injection on microprocessors.
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

Real Time Fault Injection Using a Modified Debugging Infrastructure.
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

A Framework for Fault Tolerant Real Time Systems Based on Reconfigurable FPGAs.
Proceedings of 11th IEEE International Conference on Emerging Technologies and Factory Automation, 2006

Real Time Fault Injection Using Enhanced OCD -- A Performance Analysis.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

A Modified Debugging Infrastructure to Assist Real Time Fault Injection Campaigns.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

A New Approach to Assess Defragmentation Strategies in Dynamically Reconfigurable FPGAs.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005
A self-healing real-time system based on run-time self-reconfiguration.
Proceedings of 10th IEEE International Conference on Emerging Technologies and Factory Automation, 2005

2003
Run-Time Management of Logic Resources on Reconfigurable Systems.
Proceedings of the 2003 Design, 2003

2002
Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing.
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

A Novel Methodology for the Concurrent Test of Partial and Dynamically Reconfigurable SRAM-Based FPGAs.
Proceedings of the 2002 Design, 2002

2001
Dynamically Rotate And Free for Test: The Path for FPGA Concurrent Test.
Proceedings of the 2nd Latin American Test Workshop, 2001

DRAFT: An On-Line Fault Detection Method for Dynamic and Partially Reconfigurable FPGAs.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001


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