José Luis Huertas
According to our database1,
José Luis Huertas
authored at least 93 papers
between 1976 and 2016.
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Bibliography
2016
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
2012
Proceedings of the 13th Latin American Test Workshop, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
2011
Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures.
J. Electron. Test., 2011
Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs.
Proceedings of the 20th IEEE Asian Test Symposium, 2011
2010
Proceedings of the 15th European Test Symposium, 2010
(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems.
Proceedings of the Fifth IEEE International Symposium on Electronic Design, 2010
2009
A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis.
Proceedings of the Eighteentgh Asian Test Symposium, 2009
2008
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
2007
Total ionizing dose effects in switched-capacitor filters using oscillation-based test.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007
2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST.
J. Electron. Test., 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
IEEE J. Solid State Circuits, 2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the Information Technology, Selected Tutorials, 2004
A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications.
Proceedings of the 2004 Design, 2004
2003
Microelectron. J., 2003
IEEE J. Solid State Circuits, 2003
2002
Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell.
IEEE Des. Test Comput., 2002
Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation.
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits.
Proceedings of the 3rd Latin American Test Workshop, 2002
Practical solutions for the application of the oscillation-based-test in analog integrated circuits.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002
2001
J. Electron. Test., 2001
J. Electron. Test., 2001
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000
Alternative DFT Strategies for High-Speed Pipelined Data Converters.
Proceedings of the 1st Latin American Test Workshop, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the 2000 Design, 2000
Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000
1999
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
Proceedings of the 1999 Design, 1999
1998
IEEE J. Solid State Circuits, 1998
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits.
Proceedings of the 1998 Design, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 1998 Design, 1998
1997
IEEE Trans. Fuzzy Syst., 1997
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997
A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs.
Proceedings of the European Design and Test Conference, 1997
SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems.
Proceedings of the 34st Conference on Design Automation, 1997
1996
IEEE J. Solid State Circuits, 1996
Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996
1995
IEEE J. Solid State Circuits, July, 1995
IEEE J. Solid State Circuits, July, 1995
IEEE Trans. Computers, 1995
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995
1994
IEEE J. Solid State Circuits, August, 1994
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994
Proceedings of the Advances in Neural Information Processing Systems 7, 1994
A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Modeling OpAmp-Induced Harmonic Distorition for Switched-Capacitor Sigma-Delta Modulator Design.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
IEEE Trans. Neural Networks, 1993
A Tool for Automated Design of Sigma-Delta Modulators Using Statistical Optimization.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Easily Testable PLA-based FSMS.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Proceedings of the European Design Automation Conference 1993, 1993
1992
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
1991
Proceedings of the Artificial Neural Networks, 1991
1990
Int. J. Circuit Theory Appl., 1990
A new method for the state reduction of incompletely specified finite sequential machines.
Proceedings of the European Design Automation Conference, 1990
1988
A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements.
IEEE J. Solid State Circuits, August, 1988
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988
1987
1978
Proceedings of the eighth international symposium on Multiple-valued logic, 1978
Proceedings of the eighth international symposium on Multiple-valued logic, 1978
1976
Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock Function.
IEEE Trans. Computers, 1976
IEEE Trans. Computers, 1976