José Luís Güntzel

According to our database, José Luís Güntzel authored at least 76 papers between 1998 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

ILPGRC: ILP-Based Global Routing Optimization With Cell Movements.

Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, Laleh Behjat, José Luís Güntzel

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

A Dual-Kernel Size-Configurable Gaussian Filter Architecture.

Marcio Monteiro, Ismael Seidel, José Luís Güntzel, Mateus Grellert, Leonardo Bandeira Soares, Cristina Meinhardt

Proceedings of the 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design, 2024

2023

CRP2.0: A Fast and Robust Cooperation between Routing and Placement in Advanced Technology Nodes.

Erfan Aghaeekiasaraee, Aysa Fakheri Tabrizi, Tiago Augusto Fontana, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, José Luís Güntzel, David T. Westwick, Laleh Behjat

ACM Trans. Design Autom. Electr. Syst., September, 2023

Low-Energy and Reduced-Area Hardware Architecture for the Versatile Video Coding FME.

Vanio Rodrigues Filho, Ismael Seidel, Nicole Citadin, Marcio Monteiro, Mateus Grellert, José Luís Güntzel

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

A New Approach to Video Coding Leveraging Hybrid Coding and Video Frame Interpolation.

André Beims Bräscher, Gabriela Furtado Da Silveira, Luiz Henrique Cancellier, Ismael Seidel, Mateus Grellert, José Luís Güntzel

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

2022

Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning.

Renan Netto, Sheiny Fabre, Tiago Augusto Fontana, Vinicius S. Livramento, Laércio Lima Pilla, Laleh Behjat, José Luís Güntzel

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Routability-Driven Detailed Placement Using Reinforcement Learning.

Sheiny Fabre Almeida, José Luís Güntzel, Laleh Behjat, Cristina Meinhardt

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Exploring the Impacts of Multiple Kernel Sizes of Gaussian Filters Combined to Approximate Computing in Canny Edge Detection.

Marcio Monteiro, Ismael Seidel, Mateus Grellert, José Luís Güntzel, Leonardo Bandeira Soares, Cristina Meinhardt

Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

E-RVP: An Initial Design Rule Violation Predictor Using Placement Information.

Sheiny Fabre Almeida, Aysa Fakheri Tabrizi, Erfan Aghaeekiasaraee, Renan Netto, Tiago Augusto Fontana, Upma Gandhi, José Luís Güntzel, Laleh Behjat, Cristina Meinhardt

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Autoencoder Model Exploration for Multi-Layer Video Compression.

Luiz Henrique Cancellier, Mateus Grellert, José Luís Güntzel, Luís Alberto da Silva Cruz

Proceedings of the 10th European Workshop on Visual Information Processing, 2022

2021

SAD or SATD? How the Distortion Metric Impacts a Fractional Motion Estimation VLSI Architecture.

Ismael Seidel, Vanio Rodrigues Filho, Mateus Grellert, Luciano Volcan Agostini, José Luís Güntzel

Proceedings of the 23rd International Workshop on Multimedia Signal Processing, 2021

Hardware-Friendly Search Patterns for the Versatile Video Coding Fractional Motion Estimation.

Vanio Rodrigues Filho, Marcio Monteiro, Ismael Seidel, Mateus Grellert, José Luís Güntzel

Proceedings of the 23rd International Workshop on Multimedia Signal Processing, 2021

ILP-Based Global Routing Optimization with Cell Movements.

Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, Aysa Fakheri Tabrizi, David T. Westwick, Laleh Behjat, José Luís Güntzel

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

Design of Energy-Efficient Gaussian Filters by Combining Refactoring and Approximate Adders.

Marcio Monteiro, Pedro Aquino Silva, Ismael Seidel, Mateus Grellert, Leonardo Bandeira Soares, José Luís Güntzel, Cristina Meinhardt

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Relying on a Rate Constraint to Reduce Motion Estimation Complexity.

Gabriel B. Sant'Anna, Luiz Henrique Cancellier, Ismael Seidel, Mateus Grellert, José Luís Güntzel

Proceedings of the IEEE International Conference on Acoustics, 2021

2020

Guest Editors' Introduction: SBCCI 2018.

Michael Hübner, José Luís Güntzel

IEEE Des. Test, 2020

Standalone Rate-Distortion FME Architecture.

Vanio Rodrigues Filho, Marcio Monteiro, Ismael Seidel, Mateus Grellert, José Luís Güntzel

Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

2019

Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse.

Ismael Seidel, Marcio Monteiro, Bruno Bonotto, Luciano Volcan Agostini, José Luís Güntzel

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

How Deep Learning Can Drive Physical Synthesis Towards More Predictable Legalization.

Renan Netto, Sheiny Fabre, Tiago Augusto Fontana, Vinicius S. Livramento, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 2019 International Symposium on Physical Design, 2019

2018

Enhancing Multi-Threaded Legalization Through k-d Tree Circuit Partitioning.

Sheiny Fabre, José Luís Güntzel, Laércio Lima Pilla, Renan Netto, Tiago Fontana, Vinicius S. Livramento

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

On the calculation reuse in hadamard-based SATD.

Marcio Monteiro, Ismael Seidel, José Luís Güntzel

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Coding- and Energy-Efficient FME Hardware Design.

Ismael Seidel, Vanio Rodrigues Filho, Luciano Volcan Agostini, José Luís Güntzel

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Domain-specific Language for Automated Fault Injection in SystemC Models.

Douglas Lohmann, Alexis Huf, Djones Lettnin, Frank Siqueira, José Luís Güntzel

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

On HEVC Robustness to Integer Motion Estimation Pruning.

Luiz Henrique Cancellier, Ismael Seidel, José Luís Güntzel

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

Incremental Layer Assignment Driven by an External Signoff Timing Engine.

Vinicius S. Livramento, Derong Liu, Salim Chowdhury, Bei Yu, Xiaoqing Xu, David Z. Pan, José Luís Almada Güntzel, Luiz C. V. dos Santos

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Exploiting cache locality to speedup register clustering.

Tiago Augusto Fontana, Sheiny Almeida, Renan Netto, Vinicius S. Livramento, Chrystian Guth, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Block matching hardware architecture for SATD-based successive elimination.

Luiz Henrique Cancellier, Ismael Seidel, José Luís Güntzel

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Improving the energy efficiency of a low-area SATD hardware architecture using fine grain PDE.

André Beims Bräscher, Ismael Seidel, José Luís Güntzel

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

How Game Engines Can Inspire EDA Tools Development: A use case for an open-source physical design library.

Tiago Fontana, Renan Netto, Vinicius S. Livramento, Chrystian Guth, Sheiny Almeida, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

2016

Clock-Tree-Aware Incremental Timing-Driven Placement.

Vinicius S. Livramento, Renan Netto, Chrystian Guth, José Luís Güntzel, Luiz Cláudio Villar dos Santos

ACM Trans. Design Autom. Electr. Syst., 2016

Evaluating the impact of circuit legalization on incremental optimization techniques.

Renan Netto, Vinicius S. Livramento, Chrystian Guth, Luiz C. V. dos Santos, José Luís Güntzel

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Squarer exploration for energy-efficient sum of squared differences.

Ismael Seidel, Marcio Monteiro, José Luís Almada Güntzel, Luciano Volcan Agostini

Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Speeding up Incremental Legalization with Fast Queries to Multidimensional Trees.

Renan Netto, Vinicius S. Livramento, Chrystian Guth, Luiz C. V. dos Santos, José Luís Güntzel

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

Energy-efficient SATD for beyond HEVC.

Ismael Seidel, André Beims Bräscher, José Luís Almada Güntzel, Luciano Volcan Agostini

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Rate-constrained successive elimination of Hadamard-based SATDs.

Ismael Seidel, Luiz Henrique Cancellier, José Luís Almada Güntzel, Luciano Volcan Agostini

Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

Coarse grain partial distortion elimination for Hadamard ME in HEVC.

Ismael Seidel, José Luís Güntzel, Luciano Volcan Agostini

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Exploiting parallelism to speed up circuit legalization.

Renan Netto, Chrystian Guth, Vinicius S. Livramento, Márcio Castro, Laércio Lima Pilla, José Luís Güntzel

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

Combining Pel Decimation with Partial Distortion Elimination to increase SAD energy efficiency.

Ismael Seidel, André Beims Bräscher, José Luís Güntzel

Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015

An analytical timing-driven algorithm for detailed placement.

Jucemar Monteiro, Guilherme Flach, Marcelo O. Johann, José Luís Almada Güntzel

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient Slack Histogram Compression.

Chrystian Guth, Vinicius S. Livramento, Renan Netto, Renan Fonseca, José Luís Güntzel, Luiz C. V. dos Santos

Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing Optimization.

Vinicius S. Livramento, Chrystian Guth, Renan Netto, José Luís Almada Güntzel, Luiz C. V. dos Santos

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014

A Hybrid Technique for Discrete Gate Sizing Based on Lagrangian Relaxation.

Vinicius S. Livramento, Chrystian Guth, José Luís Almada Güntzel, Marcelo O. Johann

ACM Trans. Design Autom. Electr. Syst., 2014

Energy-Efficient Hadamard-Based SATD Architectures.

Luiz Henrique Cancellier, André Beims Bräscher, Ismael Seidel, José Luís Güntzel

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

2013

Real-time digital modulation classification based on Support Vector Machines.

Edson Sorato, Eduardo P. Fronza, Paulo R. F. M. M. Barbosa, José Luís Almada Güntzel, Adalbery R. Castro, Aldebaro Klautau

Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

On the impacts of pel decimation and High-Vt/Low-Vdd on SAD calculation.

Ismael Seidel, Bruno George de Moraes, André Beims Bräscher, José Luís Güntzel

Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

VLSI architectures for Digital Modulation Classification using Support Vector Machines.

Edson Sorato, Renan Netto, Pedro Michel, José Luís Güntzel, Adalbery R. Castro, Aldebaro Klautau

Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

A low-power configurable VLSI architecture for sum of absolute differences calculation.

Ismael Seidel, Bruno George de Moraes, José Luís Güntzel

Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Quality assessment of subsampling patterns for pel decimation targeting high definition video.

Ismael Seidel, Bruno George de Moraes, Emilio Wuerges, José Luís Almada Güntzel

Proceedings of the 2013 IEEE International Conference on Multimedia and Expo, 2013

Fast and efficient lagrangian relaxation-based discrete gate sizing.

Vinicius S. Livramento, Chrystian Guth, José Luís Güntzel, Marcelo O. Johann

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Energy-efficient multi-task computing on MPSoCs: A case study from a memory perspective.

Rafael Westphal, José Luís Almada Güntzel, Luiz Cláudio Villar dos Santos

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Lagrangian relaxation-based Discrete Gate Sizing for leakage power minimization.

Vinicius dos S. Livramento, Chrystian Guth, José Luís Güntzel, Marcelo O. Johann

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011

Cache-tuning-aware scratchpad allocation from binaries.

Daniel P. Volpato, Alexandre Keunecke Ignácio Mendonça, José Luís Almada Güntzel, Luiz Cláudio Villar dos Santos

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

An energy-efficient FDCT/IDCT configurable IP core for mobile multimedia platforms.

Vinicius S. Livramento, Bruno George de Moraes, Brunno Abner Machado, José Luís Almada Güntzel

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

An energy-efficient 8×8 2-D DCT VLSI architecture for battery-powered portable devices.

Vinicius S. Livramento, Bruno George de Moraes, Brunno Abner Machado, José Luís Güntzel

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A1CSA: An energy-efficient fast adder architecture for cell-based VLSI design.

Jucemar Monteiro, José Luís Güntzel, Luciano Volcan Agostini

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010

A Post-compiling Approach that Exploits Code Granularity in Scratchpads to Improve Energy Efficiency.

Daniel P. Volpato, Alexandre Keunecke Ignácio Mendonça, Luiz C. V. dos Santos, José Luís Almada Güntzel

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009

Mapping Data and Code into Scratchpads from Relocatable Binaries.

Alexandre Keunecke Ignácio Mendonça, Daniel P. Volpato, José Luís Almada Güntzel, Luiz C. V. dos Santos

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

2007

RIC Fast Adder and its Set Tolerant Implementation in FPGAs.

Eduardo Mesquita, Helen Franck, Luciano Volcan Agostini, José Luís Güntzel

Proceedings of the FPL 2007, 2007

2006

Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical Functional Timing Analysis.

Daniel Lima Ferrão, Ricardo Reis, José Luís Almada Güntzel

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

High throughput multitransform and multiparallelism IP for H.264/AVC video compression standard.

Luciano Volcan Agostini, Roger Endrigo Carvalho Porto, José Luís Güntzel, Ivan Saraiva Silva, Sergio Bampi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

High throughput architecture for H.264/AVC forward transforms block.

Luciano Volcan Agostini, Roger Endrigo Carvalho Porto, Sergio Bampi, Leandro Rosa, José Luís Güntzel, Ivan Saraiva Silva

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005

Incremental timing optimization for automatic layout generation.

Cristiano Santos, Daniel Lima Ferrão, Ricardo Reis, José Luís Güntzel

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

A New Transistor Folding Algorithm Applied to an Automatic Full-Custom Layout Generation Tool.

Fabricio B. Bastian, Cristiano Lazzari, José Luís Almada Güntzel, Ricardo Reis

Proceedings of the Integrated Circuit and System Design, 2004

Physical design methodologies for performance predictability and manufacturability.

Ricardo Reis, Fernanda Lima Kastensmidt, José Luís Almada Güntzel

Proceedings of the First Conference on Computing Frontiers, 2004

2003

A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits.

Cristiano Lazzari, Cristiano Viana Domingues, José Luís Güntzel, Ricardo Reis

Proceedings of the VLSI-SOC: From Systems to Chips, 2003

A New Macro-cell Generation Strategy for three metal layer CMOS Technologies.

Cristiano Lazzari, Cristiano Viana Domingues, José Luís Almada Güntzel, Ricardo Augusto da Luz Reis

Proceedings of the IFIP VLSI-SoC 2003, 2003

A Transistor Sizing Method Applied to an Automatic Layout Generation Tool.

Cristiano Santos, Gustavo Wilke, Cristiano Lazzari, Ricardo Reis, José Luís Almada Güntzel

Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Improving Critical Path Identification in Functional Timing Analysis.

Daniel Lima Ferrão, Gustavo Wilke, Ricardo Augusto da Luz Reis, José Luís Almada Güntzel

Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits.

David Guerrero Martos, Gustavo Wilke, José Luís Almada Güntzel, Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Alejandro Millán

Proceedings of the Integrated Circuit and System Design, 2003

2002

Finding the Critical Delay of Combinational Blocks by Floating Vector Simulation and Path Tracing.

Gustavo Wilke, José Luís Güntzel, Márcio Bystronski, Ana Cristina Medina Pinto, Ricardo Reis

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

A Comparison Between Testability Measures Applied to Complex Gates.

José Luís Güntzel, Gustavo Wilke, Márcio Bystronski, Ana Cristina Medina Pinto, Ricardo Reis

Proceedings of the 3rd Latin American Test Workshop, 2002

2001

Análise de Timing Funcional de Circuitos VLSI Contendo Portas Complexas.

José Luís Almada Güntzel, Ricardo Augusto da Luz Reis

RITA, 2001

A Timed Calculus for ATG-Based Timing Analysis with Complex Gates.

José Luís Güntzel, Ana Cristina Medina Pinto, Ricardo Reis

Proceedings of the 2nd Latin American Test Workshop, 2001

2000

ATG-Based Timing Analysis of Circuits Containing Complex Gates.

José Luís Güntzel, Ana Cristina Medina Pinto, Eduardo D'Avila, Ricardo Reis

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1999

Designing a Mask Programmable Matrix for Sequential Circuits.

Fernanda Lima, Marcelo O. Johann, José Luís Almada Güntzel, Eduardo D'Avila, Luigi Carro, Ricardo Augusto da Luz Reis

Proceedings of the VLSI: Systems on a Chip, 1999

1998

An Improved Path Enumeration Method Considering Different Fall and Rise Gate Delays.

José Luís Güntzel, Ana Cristina Medina Pinto, Fernando Moraes, Ricardo Reis

Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998