Jose-Luis Gonzalez Jimenez

Orcid: 0000-0003-0198-2029

According to our database1, Jose-Luis Gonzalez Jimenez authored at least 24 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
A mmW RadCom System for Short-Range Hand Gesture Sensing and Data Synchronization.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Performance Assessment of a 5GNR D-Band CMOS Transceiver with Phase Noise Impairments.
Proceedings of the 2023 Joint European Conference on Networks and Communications & 6G Summit, 2023

Fast Chirping 58-64 GHz FMCW Radar Transceiver using D-PROT Multiplier in CMOS 45nm RFSOI for Vital Signs Detection.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022
Channel Bonding Transceivers for Efficient 100 Gb/s and Beyond Wireless and Plastic Waveguide Communications.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022


2021
A High-Order-N Frequency-Multiplier Using Pulsed Oscillator: Modeling and Optimization.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

2020
Channel-bonding CMOS transceiver for 100 Gbps wireless point-to-point links.
EURASIP J. Wirel. Commun. Netw., 2020

2019
6G: The Next Frontier: From Holographic Messaging to Artificial Intelligence Using Subterahertz and Visible Light Communication.
IEEE Veh. Technol. Mag., 2019

6G: The Next Frontier.
CoRR, 2019

2018
Adaptive PSK Modulation Scheme in the Presence of Phase Noise.
Proceedings of the 19th IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2018

Low Power Locking Detector for Frequency Calibration of Multi-Frequency Injection Locked Oscillators.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

VCO Verilog AMS Model for Fast Simulation in VCO-Based ADC.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm<sup>2</sup> Die-to-Die Optical Networks.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

On the Optimum Demodulation in the Presence of Gaussian Phase Noise.
Proceedings of the 25th International Conference on Telecommunications, 2018

2016
Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A broad-band 55-nm BiCMOS T/R switch for mmW 5G small cell access point.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

10 Gbps, 560 fJ/b TIA and modulator driver for optical networks-on-chip in CMOS 65nm.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

2015
A Programmable Frequency Multiplier-by-29 Architecture for Millimeter Wave Applications.
IEEE J. Solid State Circuits, 2015

Development of Wireless Techniques in Data and Power Transmission - Application for Particle Physics Detectors.
CoRR, 2015

A novel optical integrate and dump receiver for clocking signals.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

An optical clock receiver based on an injection locked ring oscillator featuring auto-calibration.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2014
A novel ultra-low phase noise, programmable frequency multiplier-by-30 architecture. Application to 60-GHz frequency generation.
Proceedings of the ESSCIRC 2014, 2014

2010
Process and Temperature Compensation for RF Low-Noise Amplifiers and Mixers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2006
Analytical and experimental verification of substrate noise spectrum for mixed-signal ICs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006


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