Jose Lugo-Alvarez
Orcid: 0000-0002-9748-4130
According to our database1,
Jose Lugo-Alvarez
authored at least 4 papers
between 2021 and 2023.
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Bibliography
2023
RF performance of Standard, High-Resistivity and Trap-Rich Silicon substrates down to cryogenic temperature.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023
2022
Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Ultra-fast CV methods (< 10µs) for interface trap spectroscopy and BTI reliability characterization using MOS capacitors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
2021
Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration.
Proceedings of the IEEE International Reliability Physics Symposium, 2021