Jose Ignacio Villar

According to our database1, Jose Ignacio Villar authored at least 3 papers between 2009 and 2012.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
Long-term on-chip verification of systems with logical events scattered in time.
Microprocess. Microsystems, 2012

2010
Design and implementation of a suitable core for on-chip long-term verification.
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010

2009
Efficient techniques and methodologies for embedded system design usign free hardware and open standards.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009


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