José E. Franca
According to our database1,
José E. Franca
authored at least 58 papers
between 1990 and 2007.
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Bibliography
2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2004
IEEE Trans. Circuits Syst. II Express Briefs, 2004
A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μ hboxm CMOS.
IEEE J. Solid State Circuits, 2004
2003
IEEE Trans. Circuits Syst. II Express Briefs, 2003
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
2001
A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
2000
A linear-phase halfband SC video interpolation filter with coefficient-sharing and spread-reduction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
High performance multirate SC circuits with predictive correlated double sampling technique.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
Fully differential variable gain instrumentation amplifier based on a fully differential DDA topology.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999
1998
A low-power CMOS nine-channel 40-MHz binary detection system with self-calibrated 500-μV offset.
IEEE J. Solid State Circuits, 1998
A novel half-band SC architecture for efficient analog impulse sampled interpolation.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Exact design of multirate switched-current FIR filters with improved phase linearity.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proc. IEEE, 1997
A CMOS 1.0-μm two-dimensional analog multirate system for real-time image processing.
IEEE J. Solid State Circuits, 1997
1996
Digitally programmable analog building blocks for the implementation of artificial neural networks.
IEEE Trans. Neural Networks, 1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of the 8th European Signal Processing Conference, 1996
Proceedings of the 8th European Signal Processing Conference, 1996
1995
IEEE J. Solid State Circuits, June, 1995
Automatic symbolic analysis of switched-capacitor filtering networks using signal flow graphs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Automatic Symbolic Characterization of SC Multirate Circuits with Finite Grain Operational Amplifiers.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1994
A high-speed programmable CMOS interface system combining D/A conversion and FIR filtering.
IEEE J. Solid State Circuits, August, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
A Methodology for Automatic Generation of Data Conversion Topologies from Algorithms.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
Proceedings of the Sixth International Conference on VLSI Design, 1993
Fully-digital Testability of a High-speed Conversion System.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
A Concurrent Two-step Flash Analogue-to-digital Converter Architecture.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Switched-capacitor Polyphase Structures for Two-dimensional Analog FIR Filtering.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Continuous-time Leapfrog Filter with Precise Successive Approximation Tuning.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Charge Programming Techniques for SC Biquads.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
High-speed D/A Conversion with Linear Phase Sin x/x Compensation.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Recent Developments and Future Trends of Multirate Analog-digital Systems.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1990
IEEE J. Solid State Circuits, June, 1990