Jose Carlos Garcia-Montesdeoca
Orcid: 0000-0003-3907-5141Affiliations:
- University of Las Palmas de Gran Canaria, Institute for Applied Microelectronics, Information and Communication Systems, Spain
According to our database1,
Jose Carlos Garcia-Montesdeoca
authored at least 31 papers
between 2004 and 2022.
Collaborative distances:
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Bibliography
2022
High Gain, Low Noise and Power Transimpedance Amplifier Based on Second Generation Voltage Conveyor in 65 nm CMOS Technology.
Sensors, 2022
2019
Versatile CMOS Current Conveyor for Digital VLSI Systems with Low-Voltage Power Supply.
J. Low Power Electron., 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Microelectron. J., 2018
J. Low Power Electron., 2018
2017
Microelectron. J., 2017
J. Low Power Electron., 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2015
Design and Optimization of a Low Power Pressure Sensor for Wireless Biomedical Applications.
J. Sensors, 2015
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
High performance single supply CMOS inverter level up shifter for multi: supply voltages domains.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2010
Application of Mixed Integer Linear Programming in the Generation of Vectors with Maximum Datapath Coverage for Combinational Logic Circuits.
J. Circuits Syst. Comput., 2010
Low-energy multi-path adiabatic CMOS driver for low-energy system applications with large capacitive load.
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
CMOS Driver-Receiver Pair for Low-Swing Signaling for Low Energy On-Chip Interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 2009
CMOS design and analysis of low-voltage signaling methodology for energy efficient on-chip interconnects.
Microelectron. J., 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Bootstrapped Adiabatic Complementary Pass-Transistor Logic Driver Circuit for Large Capacitive Load and Low-energy Applications.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
High Performance CMOS 2-input NAND Based on Low-race Split-level Charge-recycling Pass-transistor Logic.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
High Performance Bootstrapped CMOS Dual Supply Level Shifter for 0.5V Input and 1V Output.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
2008
A CMOS adiabatic inverter operating with a single clock power supply to reduce non-adiabatic loss.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
Low energy CMOS true single phase power supply clocking adiabatic differential cascode voltage switch logic circuit.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
High performance bootstrapped CMOS low to high-swing level-converter for on-chip interconnects.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Efficient CMOS driver-receiver pair with low-swing signaling for on-chip interconnects.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2004
Functional Vector Generation for Combinational Circuits Based on Data Path Coverage Metric and Mixed Integer Linear Programming.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004
Proceedings of the 2004 Design, 2004