Jose Alberto Vite-Frias

According to our database, Jose Alberto Vite-Frias authored at least 8 papers between 2005 and 2015.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2015

New Low-Distortion Q-f Droop Plus Correlation Anti-Islanding Detection Method for Power Converters in Distributed Generation Systems.

Jesús Muñoz-Cruzado-Alba, Javier Villegas-Nunez, Jose Alberto Vite-Frias, Juan Manuel Carrasco Solís, Eduardo Galvan Diez

IEEE Trans. Ind. Electron., 2015

2008

Automatic Online Diagnosis Algorithm for Broken-Bar Detection on Induction Motors Based on Discrete Wavelet Transform for FPGA Implementation.

Alejandro Ordaz-Moreno, René de Jesús Romero-Troncoso, Jose Alberto Vite-Frias, Jesus Rooney Rivera-Guillen, Arturo Garcia-Perez

IEEE Trans. Ind. Electron., 2008

2007

Special Purpose Multi-processor for On-line Fault Detection on Induction Motors during Steady State.

Jose Alberto Vite-Frias, René de Jesús Romero-Troncoso, Alejandro Ordaz-Moreno, Jesus Rooney Rivera-Guillen, Arturo Garcia-Perez

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

Dedicated Multiprocessing Unit for Polynomial Evaluation on FPGA in CNC Profile Generation.

Jesus Rooney Rivera-Guillen, René de Jesús Romero-Troncoso, Alejandro Ordaz-Moreno, Jose Alberto Vite-Frias

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

Dedicated Special Purpose Multiprocessor System for the Diagnostic of Rotor Bar Breakage on Induction Motors.

Alejandro Ordaz-Moreno, René de Jesús Romero-Troncoso, Jose Alberto Vite-Frias, Jesus Rooney Rivera-Guillen, Arturo Garcia-Perez

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

2006

8-bit CISC Microprocessor Core for Teaching Applications in the Digital Systems Laboratory.

René de Jesús Romero-Troncoso, Alejandro Ordaz-Moreno, Jose Alberto Vite-Frias, Arturo Garcia-Perez

Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

2005

VHDL core for 1024-point radix-4 FFT computation.

Jose Alberto Vite-Frias, René de Jesús Romero-Troncoso, Alejandro Ordaz-Moreno

Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005

Hardware signal processing unit for one-dimensional variable-length discrete wavelet transform.

Alejandro Ordaz-Moreno, René de Jesús Romero-Troncoso, Jose Alberto Vite-Frias

Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005