José Alberto Espejo

According to our database, José Alberto Espejo authored at least 10 papers between 1996 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Logic Transformations by Multiple Wire Network Addition.

Enrique San Millán, Luis Entrena, José Alberto Espejo

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2003

Theoretical comparison between sequential redundancy addition and removal and retiming optimization techniques.

Enrique San Millán, Luis Entrena, José Alberto Espejo, Celia López

J. Syst. Archit., 2003

2001

Logic Optimization of Unidirectional Circuits with Structural Methods.

Luis Entrena, Celia López, Emilio Olías, Enrique San Millán, José Alberto Espejo

Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

On the Optimization Power of Redundancy Addition and Removal Techniques for Sequential Circuits.

Enrique San Millán, Luis Entrena, José Alberto Espejo

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

On the Optimization Power of Redundancy Addition and Removal for Sequential Logic Optimization.

Enrique San Millán, Luis Entrena, José Alberto Espejo

Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

Generalized reasoning scheme for redundancy addition and removal logic optimization.

José Alberto Espejo, Luis Entrena, Enrique San Millán, Emilio Olías

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Functional extension of structural logic optimization techniques.

José Alberto Espejo, Luis Entrena, Enrique San Millán, Emilio Olías

Proceedings of ASP-DAC 2001, 2001

1999

Logic Restructuring for MUX-Based FPGAs.

José Alberto Espejo, Luis Entrena, Enrique San Millán, Emilio Olías

Proceedings of the 25th EUROMICRO '99 Conference, 1999

Integrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization.

Enrique San Millán, Luis Entrena, José Alberto Espejo, Silvia Chiusano, Fulvio Corno

Proceedings of the 1999 Design, 1999

1996

Timing optimization by an improved redundancy addition and removal technique.

Luis Entrena, Emilio Olías, Javier Uceda, José Alberto Espejo

Proceedings of the conference on European design automation, 1996