Jos T. J. van Eijndhoven

According to our database1, Jos T. J. van Eijndhoven authored at least 38 papers between 1988 and 2009.

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Bibliography

2009
Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors.
J. Signal Process. Syst., 2009

2007
Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors.
Trans. High Perform. Embed. Archit. Compil., 2007

2D-to-3D TV Image Mapping on TriMedias.
Proceedings of the International Conference on High Performance Computing, 2007

2006
Throughput optimization via cache partitioning for embedded multiprocessors.
Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Compositional, efficient caches for a chip multi-processor.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
IEEE-Compliant IDCT on FPGA-Augmented TriMedia.
J. VLSI Signal Process., 2005

Hardwired MPEG-4 repetitive padding.
IEEE Trans. Multim., 2005

Compositional Memory Systems for Multimedia Communicating Tasks.
Proceedings of the 2005 Design, 2005

2004
Pel reconstruction on FPGA-augmented TriMedia.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Application design trajectory towards reusable coprocessors MPEG case study.
Proceedings of the 2nd Workshop on Embedded Systems for Real-Time Multimedia, 2004

Compositional Memory Systems for Data Intensive Applications.
Proceedings of the 2004 Design, 2004

2003
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Inter-Cluster Communication Models for Clustered VLIW Processors.
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002
A Heterogeneous Multiprocessor Architecture for Flexible Media Processing.
IEEE Des. Test Comput., 2002

System-Level Design of Embedded Media Systems (Tutorial Abstract).
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

Multithreaded Architectural Support for Speculative Trace Scheduling in VLIW Processors.
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

A 2D Addressing Mode for Multimedia Applications.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

On the Benefits of Speculative Trace Scheduling in VLIW Processors.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Speculative Trace Scheduling in VLIW Processors.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Field-Programmable Custom Computing Machines - A Taxonomy -.
Proceedings of the Field-Programmable Logic and Applications, 2002

MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

Robust Media Processing in a Flexible and Cost-Effective Network of Multi-Tasking Coprocessors.
Proceedings of the 14th Euromicro Conference on Real-Time Systems (ECRTS 2002), 2002

Design of multi-tasking coprocessor control for Eclipse.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

2001
MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

An 8x8 IDCT Implementation on an FPGA-Augmented TriMedia.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

PRMDL: a machine description language for clustered VLIW architectures.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

1999
TriMedia CPU64 Application Development Environment.
Proceedings of the IEEE International Conference On Computer Design, 1999

TriMedia CPU64 Architecture.
Proceedings of the IEEE International Conference On Computer Design, 1999

1996
A Constructive Method for Exploiting Code Motion.
Proceedings of the 9th International Symposium on System Synthesis, 1996

1994
On Design Rule Correct Maze Routing.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1992
Module Generation in an Architectural Synthesis Environment.
Proceedings of the Synthesis for Control Dominated Circuits, 1992

1991
Flexible Block-Multiplier Generation.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990
PLATO: a new piecewise linear simulation tool.
Proceedings of the European Design Automation Conference, 1990

Multirate integration in a direct simulation method.
Proceedings of the European Design Automation Conference, 1990

1988
Doubly folded transistor matrix layout.
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988


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