Jos A. V. Prakash

Orcid: 0000-0003-1522-9417

According to our database1, Jos A. V. Prakash authored at least 7 papers between 2014 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
A Differential Quantizer-Based Error Feedback Modulator for Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Differentially Quantized Bandpass Error Feedback Modulator for ADCs in Digital Radio.
Circuits Syst. Signal Process., 2018

2017
Multi-Stage Noise Shaping ΔΣ Modulator with Enhanced Noise Shaping for Low Power Wideband Applications.
J. Low Power Electron., 2017

2016
A Novel Excess Sturdy-MASH-Loop-Delay Compensated Cross-Coupled Sigma-Delta Modulator.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

A multi-mode MASH ΣΑ modulator for low power wideband applications.
Proceedings of the Sixth International Symposium on Embedded Computing and System Design, 2016

2014
A Low Cost Design of Time Division Multiplexing Based 3rd Order Continuous-Time Incremental ΣΔ Modulator with Excess Loop Delay.
J. Low Power Electron., 2014

Dual Extended Noise Shaping for High Performance Cross-Coupled Sigma-Delta Modulators.
Proceedings of the Eighth International Conference on Next Generation Mobile Apps, 2014


  Loading...