Jorge V. de la Cruz

According to our database, Jorge V. de la Cruz authored at least 4 papers between 2014 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A 1-V PTAT current reference circuit with 0.05%/V current sensitivity to VDD.

Jorge V. de la Cruz, André Luiz Aita

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

System-level Design of Single-bit Sigma-Delta Modulators Based on MSA and SNR Data Graphics.

Raphael Andreoni Camponogara Viera, Jorge V. de la Cruz, André Luiz Aita, César Augusto Prior, João Baptista dos Santos Martins

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

A 0.45V CMOS relaxation oscillator with ±2.5% frequency stability from -55°C to 125°C.

André Luiz Aita, Jorge V. de la Cruz, Rizwan Bashirullah

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

System-Level Design of a Reconfigurable CT SD Modulator for Multi-Standard Wireless Applications.

Raphael Andreoni Camponogara Viera, César Augusto Prior, Jorge V. de la Cruz, João Baptista dos Santos Martins

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014