Jorge Juan

Orcid: 0000-0001-6830-7576

According to our database1, Jorge Juan authored at least 11 papers between 2006 and 2017.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2017
Minimalistic SDHC-SPI hardware reader module for boot loader applications.
Microelectron. J., 2017

2012
Long-term on-chip verification of systems with logical events scattered in time.
Microprocess. Microsystems, 2012

Network Time Synchronization: A Full Hardware Approach.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012

2011
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation.
IEEE Trans. Instrum. Meas., 2011

Studying the Viability of Static Complementary Metal-Oxide-Semiconductor Gates with a Large Number of Inputs When Using Separate Transistor Wells.
J. Low Power Electron., 2011

2010
Comprehensive Analysis on the Internal Power Dissipation of Static CMOS Cells in Ultra-Deep Sub-Micron Technologies.
J. Low Power Electron., 2010

Design and implementation of a suitable core for on-chip long-term verification.
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010

2009
Efficient techniques and methodologies for embedded system design usign free hardware and open standards.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

2007
Design of a FFT/IFFT module as an IP core suitable for embedded systems.
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007

2006
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements.
Proceedings of the International Symposium on Industrial Embedded Systems, 2006


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