Jorge Guilherme

Orcid: 0000-0001-9304-4974

According to our database1, Jorge Guilherme authored at least 39 papers between 1994 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling.
Proceedings of the 18th International Conference on Synthesis, 2022

Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient.
Proceedings of the 18th International Conference on Synthesis, 2022

A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2020
FUZYE: A Fuzzy <i>c</i>-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2018
Second-order compensation BGR with low TC and high performance for space applications.
Integr., 2018

A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications.
Proceedings of the 15th International Conference on Synthesis, 2018

11.7b Time-To-Digital Converter with 0.82ps resolution in 130nm CMOS Technology.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
Design of a BGR Suitable for the Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C.
Proceedings of the New Generation of CAS, 2017

Automatic technology migration of analog IC designs using generic cell libraries.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Logarithmic AD Converter With Selectable Transfer Characteristic.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

SCALES: A high speed simulator tool for pipeline A/D converters.
Proceedings of the 13th International Conference on Synthesis, 2016

2015
Thermal-aware floorplanning and layout generation of MOSFET power stages.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A survey on nonlinear analog-to-digital converters.
Integr., 2014

A rad-hard DC-DC converter controller.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Logarithmic AD conversion using latched comparators and a time-to-digital converter.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Automatic layout generation of power MOSFET transistors in bulk CMOS.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2011
Optimal OpAmp sizing based on a fuzzy-genetic kernel.
Proceedings of the 13th Annual Genetic and Evolutionary Computation Conference, 2011

Overcurrent detection circuit for integrated class-D amplifiers.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010
Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques
Studies in Computational Intelligence 294, Springer, ISBN: 978-3-642-12345-0, 2010

Analog circuits optimization based on evolutionary computation techniques.
Integr., 2010

2009
A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC.
IEEE J. Solid State Circuits, 2009

Reconfigurable multi-mode sigma-delta modulator for 4G mobile terminals.
Integr., 2009

Enhancing analog IC design optimization kernels with simple fuzzy models.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

A Low-cost EEG Stand-alone Device for Brain Computer Interface.
Proceedings of the BIODEVICES 2009, 2009

2008
A reconfigurable A/D converter for 4G wireless systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Overview of radiation effects and design constraints off fully custom SMPS.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
GA-SVM feasibility model and optimization kernel applied to analog IC design automation.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Design of a multimode reconfigurable sigma-delta converter for 4G wireless receivers.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
GA-SVM Optimization Kernel applied to Analog IC Design Automation.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2002
A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Design considerations for high resolution pipeline ADCs in digital CMOS technology.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

1998
Symbolic synthesis of non-linear data converters.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1995
Pushing Standard CMOS Technologies into Smart Power Conversion and Amplification.
J. Circuits Syst. Comput., 1995

New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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