Jörg Beichter

According to our database, Jörg Beichter authored at least 6 papers between 1993 and 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1995

Architektur eines programmierbaren neuronalen Signalprozessors in VLSI CMOS-Technologie zur Simulation komplexer künstlicher neuronaler Netze.

Jörg Beichter

PhD thesis, 1995

SYNAPSE-1: a high-speed general purpose parallel neurocomputer system.

Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Joachim Gläß, Andreas Wurz, Reinhard Männer

Proceedings of IPPS '95, 1995

1993

A general-purpose signal processor architecture for neurocomputing and preprocessing applications.

Ulrich Ramacher, Jörg Beichter, Nico Brüls

J. VLSI Signal Process., 1993

Design of a general-purpose neural signal processor.

Jörg Beichter, Nico Brüls, Elisabeth Sicheneder, Ulrich Ramacher, Heinrich Klar

Neurocomputing, 1993

Multiprocessor And Memory Architecture Of The Neurocomputer Synapse-1.

Ulrich Ramacher, Wolfgang Raab, Joachim K. Anlauf, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Reinhard Männer, Joachim Gläß, Andreas Wurz

Int. J. Neural Syst., 1993

Architecture and VLSI Design of a VLSI Neural Signal Processor.

Ulrich Ramacher, Jörg Beichter, Nico Brüls, Elisabeth Sicheneder

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993