Jordi Madrenas
Orcid: 0000-0001-5905-9179
According to our database1,
Jordi Madrenas
authored at least 83 papers
between 1994 and 2024.
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Bibliography
2024
Real-time hardware emulation of neural cultures: A comparative study of in vitro, in silico and in duris silico models.
Neural Networks, 2024
Design of Mixed-Signal LSI with Analog Spiking Neural Network and Digital Inference Circuits for Reservoir Computing.
Proceedings of the International Joint Conference on Neural Networks, 2024
2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
Proceedings of the Artificial Neural Networks and Machine Learning, 2023
2022
Proceedings of the Artificial Life and Evolutionary Computation - 16th Italian Workshop, 2022
A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation.
Proceedings of the International Joint Conference on Neural Networks, 2022
Real-Time Display of Spiking Neural Activity of SIMD Hardware Using an HDMI Interface.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2022, 2022
2021
IEEE Open J. Circuits Syst., 2021
Hardware-Software Co-Design for Efficient and Scalable Real-Time Emulation of SNNs on the Edge.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2021, 2021
2020
A CMOS-MEMS BEOL 2-axis Lorentz-Force Magnetometer with Device-Level Offset Cancellation.
Sensors, 2020
Resonant MEMS Pressure Sensor in 180 nm CMOS Technology Obtained by BEOL Isotropic Etching.
Sensors, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
2019
LEGION-based image segmentation by means of spiking neural networks using normalized synaptic weights implemented on a compact scalable neuromorphic architecture.
Neurocomputing, 2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the Advances in Artificial Intelligence, Software and Systems Engineering, 2019
2018
SNAVA - A real-time multi-FPGA multi-model spiking neural network simulation architecture.
Neural Networks, 2018
Optimizing Power Consumption vs. Linearization in CMFB Amplifiers with Source Degeneration.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Efficient Configuration for a Scalable Spiking Neural Network Platform by means of a Synchronous Address Event Representation bus.
Proceedings of the 2018 NASA/ESA Conference on Adaptive Hardware and Systems, 2018
2017
Self-adaptive hardware architecture with parallel processing capabilities and dynamic reconfiguration.
Proceedings of the 16th Workshop on Adaptive and Reflective Middleware, 2017
Complexity Reduction of Neural Network Model for Local Motion Detection in Motion Stereo Vision.
Proceedings of the Neural Information Processing - 24th International Conference, 2017
2016
AER-SRT: Scalable spike distribution by means of synchronous serial ring topology address event representation.
Neurocomputing, 2016
Temperature and pressure characterization of the quality factor in a CMOS-MEMS resonator.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016
Compact Associative Memory for AER Spike Decoding in FPGA-Based Evolvable SNN Emulation.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2016, 2016
Synfire Chain Emulation by Means of Flexible SNN Modeling on a SIMD Multicore Architecture.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2016, 2016
2014
Quasi-digital front-ends for current measurement in integrated circuits with giant magnetoresistance technology.
IET Circuits Devices Syst., 2014
2013
Spike-based analog-digital neuromorphic information processing system for sensor applications.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Conference on Green Computing and Communications (GreenCom) and IEEE Internet of Things (iThings) and IEEE Cyber, 2013
2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
IEEE J. Solid State Circuits, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Sense/drive architecture for CMOS-MEMS accelerometers with relaxation oscillator and TDC.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2011
Microelectron. Reliab., 2011
Continuous-time CMOS adaptive asynchronous ΣΔ modulator approximating low-ƒs low-inband-error on-chip wideband power amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Bioinspired Sensory Integration for Environment-Perception Embedded Systems.
Proceedings of the BIODEVICES 2011, 2011
2010
Performance Evaluation and Scaling of a Multiprocessor Architecture Emulating Complex SNN Algorithms.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2010
Implementation of a Power-Aware Dynamic Fault Tolerant Mechanism on the Ubichip Platform.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
Implementation of a Dynamic Fault-Tolerance Scaling Technique on a Self-Adaptive Hardware Architecture.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
Proceedings of the IEEE Congress on Evolutionary Computation, 2009
SpiNDeK: An Integrated design tool for the multiprocessor emulation of complex bioinspired spiking neural networks.
Proceedings of the IEEE Congress on Evolutionary Computation, 2009
Proceedings of the IEEE Congress on Evolutionary Computation, 2009
Synchronous Digital Implementation of the AER Communication Scheme for Emulating Large-Scale Spiking Neural Networks Models.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
Int. J. Knowl. Based Intell. Eng. Syst., 2008
Exponential-enhanced characteristic of MOS transistors and its application to log-domain circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
An asynchronous finite state machine controller for integrated buck-boost power converters in wideband signal-tracking applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
A reconfigurable translinear cell architecture for CMOS field-programmable analog arrays.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008
BAF: A Bio-Inspired Agent Framework for Distributed Pervasive Applications.
Proceedings of the 2008 International Conference on Genetic and Evolutionary Methods, 2008
2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
2006
Neurocomputing, 2006
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
IEEE Trans. Neural Networks, 2004
Proceedings of the 12th European Symposium on Artificial Neural Networks, 2004
2003
IEEE Trans. Neural Networks, 2003
2001
A microelectronic implementation of a bioinspired analog matrix for object segmentation of a visual scene.
Proceedings of the 9th European Symposium on Artificial Neural Networks, 2001
2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration.
Proceedings of the 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), 1999
1998
Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices.
Proceedings of the Evolvable Systems: From Biology to Hardware, 1998
1997
Using Classical and Evolutive Neural Models in Industrial Applications: A Case Study for an Automatic Coin Classifier.
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997
Improving the Performance of Piecewise Linear Separation Incremental Algorithms for Practical Hardware Implementations.
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997
Practical Design Methodology for Commercial Automatic Coin Recognizers Based on Neural Decision Engines.
Proceedings of the Progress in Connectionist-Based Information Systems: Proceedings of the 1997 International Conference on Neural Information Processing and Intelligent Information Systems, 1997
Proceedings of the Artificial Neural Networks, 1997
1995
Proceedings of the From Natural to Artificial Neural Computation, 1995
Proceedings of the From Natural to Artificial Neural Computation, 1995
Proceedings of the 3rd European Symposium on Artificial Neural Networks, 1995
Derivation of a new criterion function based on an information measure for improving piecewise linear separation incremental algorithms.
Proceedings of the 3rd European Symposium on Artificial Neural Networks, 1995
1994