Jordi Cortadella
Orcid: 0000-0001-8114-250XAffiliations:
- Polytechnic University of Catalonia, Barcelona, Spain
According to our database1,
Jordi Cortadella
authored at least 193 papers
between 1988 and 2025.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2015, "For contributions to the design of asynchronous and elastic circuits".
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Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on zbmath.org
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on scopus.com
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on cs.upc.edu
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on orcid.org
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on id.loc.gov
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on d-nb.info
On csauthors.net:
Bibliography
2025
ACM Trans. Design Autom. Electr. Syst., 2025
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2024
2023
Generation of synchronizing state machines from a transition system: A region-based approach.
Int. J. Appl. Math. Comput. Sci., 2023
Mix & Latch: An Optimization Flow for High-Performance Designs With Single-Clock Mixed-Polarity Latches and Flip-Flops.
IEEE Access, 2023
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
2022
ACM Trans. Reconfigurable Technol. Syst., 2022
Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Decomposition of transition systems into sets of synchronizing Free-choice Petri Nets.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
Multilevel Dataflow-Driven Macro Placement Guided by RTL Structure and Analytical Methods.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
CNN-on-AWS: Efficient Allocation of Multikernel Applications on Multi-FPGA Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
2020
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Automatic Safe Data Reuse Detection for the WCET Analysis of Systems With Data Caches.
IEEE Access, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
IEEE Trans. Learn. Technol., 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019
Proceedings of the Carl Adam Petri: Ideas, Personality, Impact, 2019
2018
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems, 2018
2017
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the 23rd IEEE International Symposium on Asynchronous Circuits and Systems, 2017
Waveform Transition Graphs: A Designer-Friendly Formalism for Asynchronous Behaviours.
Proceedings of the 23rd IEEE International Symposium on Asynchronous Circuits and Systems, 2017
A hierarchical mathematical model for automatic pipelining and allocation using elastic systems.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017
Proceedings of the 17th International Conference on Application of Concurrency to System Design, 2017
2016
A Fast and Retargetable Framework for Logic-IP-Internal Electromigration Assessment Comprehending Advanced Waveform Effects.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Proceedings of the 31st Annual ACM Symposium on Applied Computing, 2016
Discovering Duplicate Tasks in Transition Systems for the Simplification of Process Models.
Proceedings of the Business Process Management - 14th International Conference, 2016
Proceedings of the 22nd IEEE International Symposium on Asynchronous Circuits and Systems, 2016
Proceedings of the 22nd IEEE International Symposium on Asynchronous Circuits and Systems, 2016
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Proceedings of the Business Process Management - 13th International Conference, 2015
A retargetable and accurate methodology for logic-IP-internal electromigration assessment.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
IEEE Trans. Knowl. Data Eng., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Physical planning for the architectural exploration of large-scale chip multiprocessors.
Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013
Proceedings of the International Symposium on Physical Design, 2013
2012
Integrating formal verification in an online judge for e-Learning logic circuit design.
Proceedings of the 43rd ACM technical symposium on Computer science education, 2012
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012
2011
ACM J. Emerg. Technol. Comput. Syst., 2011
2010
IEEE Trans. Computers, 2010
On the Performance Evaluation of Multi-Guarded Marked Graphs with Single-Server Semantics.
Discret. Event Dyn. Syst., 2010
Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2010
Proceedings of the NOCS 2010, 2010
Proceedings of the 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010), 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
A performance analytical model for Network-on-Chip with constant service time routers.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the Business Process Management, 7th International Conference, 2009
Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009
Proceedings of the Ninth International Conference on Application of Concurrency to System Design, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
ACM J. Emerg. Technol. Comput. Syst., 2008
Proceedings of the XXVII International Conference of the Chilean Computer Science Society (SCCC 2008), 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Performance optimization of elastic systems using buffer resizing and buffer insertion.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the Business Process Management, 6th International Conference, 2008
Proceedings of the Applications and Theory of Petri Nets, 29th International Conference, 2008
Proceedings of the 8th International Conference on Application of Concurrency to System Design (ACSD 2008), 2008
2007
Fundam. Informaticae, 2007
Fundam. Informaticae, 2007
Found. Trends Electron. Des. Autom., 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the Petri Nets and Other Models of Concurrency, 2007
2006
Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
Proceedings of the Applications and Theory of Petri Nets 2005, 2005
2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 3rd International Conference on Application of Concurrency to System Design (ACSD 2003), 2003
Proceedings of the Lectures on Concurrency and Petri Nets, 2003
2002
Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002
Fundam. Informaticae, 2002
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
Bi-Decomposition and Tree-Height Reduction for Timing Optimization.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002
Proceedings of the Formal Methods in Computer-Aided Design, 4th International Conference, 2002
Proceedings of the 2002 Design, 2002
Proceedings of the Applications and Theory of Petri Nets 2002, 2002
Proceedings of the Concurrency and Hardware Design, Advances in Petri Nets, 2002
2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 2001
2000
Task generation and compile-time scheduling for mixed data-control embedded software.
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000
Proceedings of the Application and Theory of Petri Nets 2000, 2000
A Relational View of Subgraph Isomorphism.
Proceedings of the Participants Copies of Fifth International Seminar on Relational Methods in Computer Science, 2000
1999
Decomposition and technology mapping of speed-independent circuits using Boolean relations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
J. Syst. Archit., 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the 36th Conference on Design Automation, 1999
Proceedings of the 36th Conference on Design Automation, 1999
Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications.
Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 1999
Proceedings of the Application and Theory of Petri Nets 1999, 1999
1998
IEEE Trans. Very Large Scale Integr. Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
The Use of Petri Nets for the Design and Verification of Asynchronous Circuits and Systems.
J. Circuits Syst. Comput., 1998
Integr. Comput. Aided Eng., 1998
Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Lazy transition systems: application to timing optimization of asynchronous circuits.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 35th Conference on Design Automation, 1998
Identifying State Coding Conflicts in Asynchronous System Specifications Using Petri Net Unfoldings.
Proceedings of the 1st International Conference on Application of Concurrency to System Design (ACSD '98), 1998
Combining Structural and Symbolic Methods for the Verification of Concurrent Systems.
Proceedings of the 1st International Conference on Application of Concurrency to System Design (ACSD '98), 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997
Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis.
Proceedings of the European Design and Test Conference, 1997
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 1997
Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 1997
Proceedings of the Application and Theory of Petri Nets 1997, 1997
1996
Proceedings of the Euro-Par '96 Parallel Processing, 1996
Proceedings of the 1996 European Design and Test Conference, 1996
Proceedings of the 33st Conference on Design Automation, 1996
Combining process algebras and Petri nets for the specification and synthesis of asynchronous circuits.
Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996
Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996
1995
Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), 1995
Proceedings of the 1995 European Design and Test Conference, 1995
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995
Proceedings of the Application and Theory of Petri Nets 1995, 1995
1994
Design and Prototyping of Digital Signal Processing (DSP) Systems: Introduction.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994
Designing asynchronous circuits from behavioural specifications with internal conflicts.
Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems, 1994
Proceedings of the Application and Theory of Petri Nets 1994, 1994
1993
Microprocess. Microprogramming, 1993
Microprocess. Microprogramming, 1993
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993
Polynomial algorithms for the synthesis for hazard-free circuits from signal transition graphs.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993
1992
Comments on 'Using cache mechanisms to exploit nonrefreshing DRAM's for on-chip memories'.
IEEE J. Solid State Circuits, January, 1992
IEEE Trans. Computers, 1992
1991
Microprocessing and Microprogramming, 1991
1989
Microprocessing and Microprogramming, 1989
1988
Designing a branch target buffer for executing branches with zero time cost in a RISC processor.
Microprocess. Microprogramming, 1988
Microprocess. Microprogramming, 1988