Jooyeon Jeong

According to our database, Jooyeon Jeong authored at least 7 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Placement legalization for heterogeneous cells of non-integer multiple-heights.

Jooyeon Jeong, Taewhan Kim

Integr., 2024

Binding Multi-bit Flip-flop Cells through Design and Technology Co-optimization.

Jooyeon Jeong, Taewhan Kim

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

Synthesis and Utilization of Standard Cells Amenable to Gear Ratio of Gate-Metal Pitches for Improving Pin Accessibility.

Jooyeon Jeong, Sehyeon Chung, Kyeongrok Jo, Taewhan Kim

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

Improving Performance and Power by Co-Optimizing Middle-of-Line Routing, Pin Pattern Generation, and Contact over Active Gates in Standard Cell Layout Synthesis.

Sehyeon Chung, Jooyeon Jeong, Taewhan Kim

Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

2021

Minimum Implant Area-Aware Threshold Voltage Refinement in Pre-Placement.

Eunsol Jeong, Heechun Park, Jooyeon Jeong, Taewhan Kim

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Utilizing Middle-of-Line Resource in Filler Cells for Fixing Routing Failures.

Jooyeon Jeong, Taewhan Kim

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Challenges on DTCO Methodology Towards Deep Submicron Interconnect Technology.

Heechun Park, Kyungjoon Chang, Jooyeon Jeong, Jaehoon Ahn, Ki-Seok Chung, Taewhan Kim

Proceedings of the 18th International SoC Design Conference, 2021