Joonhee Lee
Orcid: 0000-0001-7130-0551
According to our database1,
Joonhee Lee
authored at least 18 papers
between 2005 and 2024.
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Bibliography
2024
4.2 A Tri-Band Dual-Concurrent Wi-Fi 802.11be Transceiver Achieving -46dB TX/RX EVM Floor at 7.1GHz for a 4K-QAM 320MHz Signal.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
4.3 A 43mm<sup>2</sup> Fully Integrated Legacy Cellular and 5G FR1 RF Transceiver with 24RX/3TX Supporting Inter-Band 7CA/5CA 4×4 MIMO with 1K-QAM.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2022
Boole's probability bounding problem, linear programming aggregations, and nonnegative quadratic pseudo-Boolean functions.
Proceedings of the International Symposium on Artificial Intelligence and Mathematics 2022 (ISAIM 2022), 2022
Efficient and Accurate Quantized Image Super-Resolution on Mobile NPUs, Mobile AI & AIM 2022 Challenge: Report.
Proceedings of the Computer Vision - ECCV 2022 Workshops, 2022
Efficient Single-Image Depth Estimation on Mobile Devices, Mobile AI & AIM 2022 Challenge: Report.
Proceedings of the Computer Vision - ECCV 2022 Workshops, 2022
2021
Proceedings of the ASIA CCS '21: ACM Asia Conference on Computer and Communications Security, 2021
2020
An RF Transceiver with Full Digital Interface Supporting 5G New Radio FR1 with 3.84Gbps DL/1.92Gbps UL and Dual-Band GNSS in 14nm FinFET CMOS.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the International Symposium on Artificial Intelligence and Mathematics, 2020
2019
A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS.
IEEE J. Solid State Circuits, 2019
A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2017
A 14-nm 0.14-ps<sub>rms</sub> Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration.
IEEE J. Solid State Circuits, 2017
24.8 A 14nm fractional-N digital PLL with 0.14psrms jitter and -78dBc fractional spur for cellular RFICs.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
2011
A 470-µW 5-GHz Digitally Controlled Injection-Locked Multi-Modulus Frequency Divider With an In-Phase Dual-Input Injection Scheme.
IEEE Trans. Very Large Scale Integr. Syst., 2011
2009
IEICE Trans. Electron., 2009
2005
IEICE Trans. Commun., 2005