Jongsun Park

According to our database, Jongsun Park authored at least 149 papers between 2000 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

SOT-MRAM-Based LUT Cell Design for Area- and Energy-Efficient FPGA.

Dongsu Kim, Taehwan Kim, Yunho Jang, Jongsun Park

IEEE Trans. Circuits Syst. II Express Briefs, September, 2024

A 28-nm 50.1-TOPS/W P-8T SRAM Compute-In-Memory Macro Design With BL Charge-Sharing-Based In-SRAM DAC/ADC Operations.

Kyeongho Lee, Joonhyung Kim, Jongsun Park

IEEE J. Solid State Circuits, June, 2024

iSPADE: End-to-end Sparse Architecture for Dense DNN Acceleration via Inverted-bit Representation.

Dongjun Kim, Han Cho, Jongsun Park

Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

STT-MRAM-based Near-Memory Computing Architecture with Read Scheme and Dataflow Co-Design for High-Throughput and Energy-Efficiency.

Yunho Jang, Yeseul Kim, Jongsun Park

Proceedings of the 29th ACM/IEEE International Symposium on Low Power Electronics and Design, 2024

SpARC: Token Similarity-Aware Sparse Attention Transformer Accelerator via Row-wise Clustering.

Han Cho, Dongjun Kim, Seungeon Hwang, Jongsun Park

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

LoCoExNet: Low-Cost Early Exit Network for Energy Efficient CNN Accelerator Design.

Joongho Jo, Geonho Kim, Seungtae Kim, Jongsun Park

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

Low Complexity Gradient Computation Techniques to Accelerate Deep Neural Network Training.

Dongyeob Shin, Geonho Kim, Joongho Jo, Jongsun Park

IEEE Trans. Neural Networks Learn. Syst., September, 2023

A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network.

Sungsoo Cheon, Kyeongho Lee, Jongsun Park

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023

Low Area and Low Power Threshold Implementation Design Technique for AES S-Box.

Junhyun Song, Kyeongho Lee, Jongsun Park

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

2022

Area and Energy Efficient Joint 2T SOT-MRAM-Based on Diffusion Region Sharing With Adjacent Cells.

Yunho Jang, Jongsun Park

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Dual-Domain Dynamic Reference Sensing for Reliable Read Operation in SOT-MRAM.

Jooyoon Kim, Yunho Jang, Taehwan Kim, Jongsun Park

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix Multiplication.

Taehwan Kim, Yunho Jang, Min-Gu Kang, Byong-Guk Park, Kyung-Jin Lee, Jongsun Park

IEEE Trans. Computers, 2022

Stochastic SOT Device Based SNN Architecture for On-Chip Unsupervised STDP Learning.

Yunho Jang, Gyuseong Kang, Taehwan Kim, Yeongkyo Seo, Kyung-Jin Lee, Byong-Guk Park, Jongsun Park

IEEE Trans. Computers, 2022

Early Termination Based Training Acceleration for an Energy-Efficient SNN Processor Design.

Sunghyun Choi, Dongwoo Lew, Jongsun Park

IEEE Trans. Biomed. Circuits Syst., 2022

Bit-Line Decoupled SRAM for Reducing Read Delays in Near Threshold Voltage Operations.

Hyunchul Park, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

A Layer-wise Training and Pruning Method for Memory Efficient On-chip Learning Hardware.

Dongwoo Lew, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Clipped Quantization Aware Training for Hardware Friendly Implementation of Image Classification Networks.

Kyungchul Lee, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

SRAM Bit-line Boosting Circuit for Low Latency and Timing Aware Read Operation.

Hyeyeong Lee, Joonhyung Kim, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

The Quantitative Comparisons of Analog and Digital SRAM Compute-In-Memories for Deep Neural Network Applications.

Joonhyung Kim, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

High Detection Rate BCH Code with CRC Code for Memory Application.

Minseo Kim, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Distributed Accumulation based Energy Efficient STT-MRAM based Digital PIM Architecture.

Dongsu Kim, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Energy-Efficient STT-MRAM based Digital PIM supporting Vertical Computations Using Sense Amplifier.

Yeseul Kim, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Source-Line Shared SOT-MRAM Cell for Energy Efficient Read Operation.

Taehwan Kim, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Data Bus Inversion Encoding for Improving the Power Efficiency of SERDES-Containing Data Bus.

Seongyoon Kang, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Class Difficulty based Mixed Precision Quantization for Low Complexity CNN Training.

Joongho Jo, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Percentile Clipping based Low Bit-Precision Quantization for Depth Estimation Network.

Seungeon Hwang, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

Channel-Wise Activation Map Pruning using Max-Pool for Reducing Memory Accesses.

Han Cho, Jongsun Park

Proceedings of the 19th International SoC Design Conference, 2022

A Charge Domain P-8T SRAM Compute-In-Memory with Low-Cost DAC/ADC Operation for 4-bit Input Processing.

Joonhyung Kim, Kyeongho Lee, Jongsun Park

Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

Low-Cost 7T-SRAM Compute-in-Memory Design Based on Bit-Line Charge-Sharing Based Analog-to-Digital Conversion.

Kyeongho Lee, Joonhyung Kim, Jongsun Park

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

A time-to-first-spike coding and conversion aware training for energy-efficient deep spiking neural network processor design.

Dongwoo Lew, Kyungchul Lee, Jongsun Park

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

A 10T SRAM Compute-In-Memory Macro with Analog MAC Operation and Time Domain Conversion.

Hyunchul Park, Kyeongho Lee, Jongsun Park

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

BiMDiM: Area efficient Bi-directional MRAM Digital in-Memory Computing.

Dongsu Kim, Yunho Jang, Taehwan Kim, Jongsun Park

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

An Error Compensation Technique for Low-Voltage DNN Accelerators.

Daehan Ji, Dongyeob Shin, Jongsun Park

IEEE Trans. Very Large Scale Integr. Syst., 2021

Exploiting Retraining-Based Mixed-Precision Quantization for Low-Cost DNN Accelerator Design.

Nahsung Kim, Dongyeob Shin, Wonseok Choi, Geonho Kim, Jongsun Park

IEEE Trans. Neural Networks Learn. Syst., 2021

A 65-nm 0.6-fJ/Bit/Search Ternary Content Addressable Memory Using an Adaptive Match-Line Discharge.

Kyeongho Lee, Woong Choi, Jongsun Park

IEEE J. Solid State Circuits, 2021

An Even/Odd Error Detection Based Low-Complexity Chase Decoding for Low-Latency RS Decoder Design.

Jinho Jeong, Dongyeob Shin, Wongyu Shin, Jongsun Park

IEEE Commun. Lett., 2021

Local Bit-line Charge-sharing based Pre-charging SRAM for Near Threshold Voltage Operation.

Hyunchul Park, Jongsun Park

Proceedings of the 18th International SoC Design Conference, 2021

A Charge-domain 10T SRAM based In-Memory-Computing Macro for Low Energy and Highly Accurate DNN inference.

Joonhyung Kim, Jongsun Park

Proceedings of the 18th International SoC Design Conference, 2021

Low Energy and Error Resilient SOT-MRAM based FPGA LUT Cell.

Dongsu Kim, Jongsun Park

Proceedings of the 18th International SoC Design Conference, 2021

Low Energy Domain Wall Memory Based Convolution Neural Network Design with Optimizing MAC Architecture.

Jooyoon Kim, Yunho Jang, Taehwan Kim, Jongsun Park

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Low Cost Heterogeneous ARIA S-Box Implementation for CPA-Resistance.

Junghoon Cho, Junhyun Song, Jongsun Park

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

An Energy-Efficient SNN Processor Design based on Sparse Direct Feedback and Spike Prediction.

Seunghwan Bang, Dongwoo Lew, Sunghyun Choi, Jongsun Park

Proceedings of the International Joint Conference on Neural Networks, 2021

Key Length Reconfigurable ARIA Hardware with S-box Optimization.

Junhyun Song, Junghoon Cho, Jongsun Park

Proceedings of the International Conference on Electronics, Information, and Communication, 2021

Low Power SOT-MRAM Cell Configuration For Dual Write Operation.

Jooyoon Kim, Kwanho Bae, Jongsun Park

Proceedings of the International Conference on Electronics, Information, and Communication, 2021

A Charge-Sharing based 8T SRAM In-Memory Computing for Edge DNN Acceleration.

Kyeongho Lee, Sungsoo Cheon, Joongho Jo, Woong Choi, Jongsun Park

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

An Energy-Quality Scalable STDP Based Sparse Coding Processor With On-Chip Learning Capability.

Heetak Kim, Hoyoung Tang, Woong Choi, Jongsun Park

IEEE Trans. Biomed. Circuits Syst., 2020

Rank order coding based spiking convolutional neural network architecture with energy-efficient membrane voltage updates.

Hoyoung Tang, Donghyeon Cho, Dongwoo Lew, Taehwan Kim, Jongsun Park

Neurocomputing, 2020

Domain Wall Memory-Based Design of Deep Neural Network Convolutional Layers.

Jinil Chung, Woong Choi, Jongsun Park, Swaroop Ghosh

IEEE Access, 2020

Early Image Termination Technique During STDP Training of Spiking Neural Network.

Dongwoo Lew, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Variation-Tolerant Separated Pre-Charge Sense Amplifier for Resistive Non-Volatile logic circuit.

Jooyoon Kim, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Low Cost Early Exit Decision Unit Design for CNN Accelerator.

Geonho Kim, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Confidence Score based Mini-batch Skipping for CNN Training on Mini-batch Training Environment.

Joongho Jo, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Fast 6T SRAM Bit-Line Computing with Consecutive Short Pulse Word-Lines and Skewed Inverter.

Jinho Jeong, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Early Termination of STDP Learning with Spike Counts in Spiking Neural Networks.

Sunghyun Choi, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Implementation of Low Cost ARIA Architecture with Composite Field Optimization and Datapath Modification.

Junghoon Cho, Junhyun Song, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

A Bit-Line Boosting Technique for Fast Bit-Line Computation without Read Disturbance.

Sungsoo Cheon, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Efficient TSV Fault Detection Scheme For High Bandwidth Memory Using Pattern Analysis.

Kwanho Bae, Jongsun Park

Proceedings of the International SoC Design Conference, 2020

Dynamic-Reference Based Early Write Termination for Low Energy SOT-MRAM.

Taehwan Kim, Eunjong Yeo, Yunho Jang, Yeongkyo Seo, Jongsun Park

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Prediction Confidence based Low Complexity Gradient Computation for Accelerating DNN Training.

Dongyeob Shin, Geonho Kim, Joongho Jo, Jongsun Park

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision.

Kyeongho Lee, Jinho Jeong, Sungsoo Cheon, Woong Choi, Jongsun Park

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Charge-Recycling-Based Redundant Write Prevention Technique for Low-Power SOT-MRAM.

Gyuseong Kang, Jongsun Park

IEEE Trans. Very Large Scale Integr. Syst., 2019

Spike Counts Based Low Complexity SNN Architecture With Binary Synapse.

Hoyoung Tang, Heetak Kim, Hyeonseong Kim, Jongsun Park

IEEE Trans. Biomed. Circuits Syst., 2019

Compact Implementations of HIGHT Block Cipher on IoT Platforms.

Bohun Kim, Junghoon Cho, Byungjun Choi, Jongsun Park, Hwajeong Seo

Secur. Commun. Networks, 2019

Sensitivity-Based Error Resilient Techniques With Heterogeneous Multiply-Accumulate Unit for Voltage Scalable Deep Neural Network Accelerators.

Dongyeob Shin, Wonseok Choi, Jongsun Park, Swaroop Ghosh

IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

A Perspective on Test Methodologies for Supervised Machine Learning Accelerators.

Seyedhamidreza Motaman, Swaroop Ghosh, Jongsun Park

IEEE J. Emerg. Sel. Topics Circuits Syst., 2019

Design of Processing-"Inside"-Memory Optimized for DRAM Behaviors.

Won Jun Lee, Chang Hyun Kim, Yoonah Paik, Jongsun Park, Il Park, Seon Wook Kim

IEEE Access, 2019

An Energy-efficient On-chip Learning Architecture for STDP based Sparse Coding.

Heetak Kim, Hoyoung Tang, Jongsun Park

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

Low Cost Ternary Content Addressable Memory Based on Early Termination Precharge Scheme.

Kyeongho Lee, Geon Ko, Jongsun Park

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Sensitivity based Error Resilient Techniques for Energy Efficient Deep Neural Network Accelerators.

Wonseok Choi, Dongyeob Shin, Jongsun Park, Swaroop Ghosh

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

Energy Efficient Canny Edge Detector for Advanced Mobile Vision Applications.

Juseong Lee, Hoyoung Tang, Jongsun Park

IEEE Trans. Circuits Syst. Video Technol., 2018

A Low-Latency and Area-Efficient Gram-Schmidt-Based QRD Architecture for MIMO Receiver.

Dongyeob Shin, Jongsun Park

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Mosaic-CNN: A Combined Two-Step Zero Prediction Approach to Trade off Accuracy and Computation Energy in Convolutional Neural Networks.

Cheolhwan Kim, Dongyeob Shin, Bohun Kim, Jongsun Park

IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Area-Optimized Fully-Flexible BCH Decoder for Multiple GF Dimensions.

Byeonggil Park, Jongsun Park, Youngjoo Lee

IEEE Access, 2018

Low Cost Convolutional Neural Network Accelerator Based on Bi-Directional Filtering and Bit-Width Reduction.

Woong Choi, Kyungrak Choi, Jongsun Park

IEEE Access, 2018

Half-and-Half Compare Content Addressable Memory with Charge-Sharing Based Selective Match-Line Precharge Scheme.

Woong Choi, Jongsun Park, Hoonki Kim, Changnam Park, Taejoong Song

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Spin Orbit Torque-RAM Write Energy Reduction with Self-Verification Scheme.

Taehwan Kim, Jongsun Park

Proceedings of the International SoC Design Conference, 2018

Low Cost Hardware Implementation of LEA-128 Encryption using Bit-Serial Technique.

Byungjun Choi, Bohun Kim, Jongsun Park

Proceedings of the International SoC Design Conference, 2018

Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP Learning.

Gyuseong Kang, Yunho Jang, Jongsun Park

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Charge-Recycling based Redundant Write Prevention Technique for Low Power SOT-MRAM.

Gyuseong Kang, Yunho Jang, Jongsun Park

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme.

Woong Choi, Kyeongho Lee, Jongsun Park

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Spike Counts Based Low Complexity Learning with Binary Synapse.

Hoyoung Tang, Heetak Kim, Donghyeon Cho, Jongsun Park

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Content addressable memory based binarized neural network accelerator using time-domain signal processing.

Woong Choi, Kwanghyo Jeong, Kyungrak Choi, Kyeongho Lee, Jongsun Park

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Embedded DRAM-Based Memory Customization for Low-Cost FFT Processor Design.

Gyuseong Kang, Woong Choi, Jongsun Park

IEEE Trans. Very Large Scale Integr. Syst., 2017

Half-Select Free and Bit-Line Sharing 9T SRAM for Reliable Supply Voltage Scaling.

Kyungho Shin, Woong Choi, Jongsun Park

IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Novel Folded-KES Architecture for High-Speed and Area-Efficient BCH Decoders.

Byeonggil Park, Seungyong An, Jongsun Park, Youngjoo Lee

IEEE Trans. Circuits Syst. II Express Briefs, 2017

Improved Perturbation Vector Generation Method for Accurate SRAM Yield Estimation.

Woong Choi, Jongsun Park

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Replacing eFlash with STTRAM in IoTs: Security Challenges and Solutions.

Asmit De, Mohammad Nasim Imtiaz Khan, Jongsun Park, Swaroop Ghosh

J. Hardw. Syst. Secur., 2017

Adaptive ECC for Tailored Protection of Nanoscale Memory.

Dongyeob Shin, Jongsun Park, Jangwon Park, Somnath Paul, Swarup Bhunia

IEEE Des. Test, 2017

An efficient convolutional neural networks design with heterogeneous SRAM cell sizing.

Wonseok Choi, Jongsun Park

Proceedings of the International SoC Design Conference, 2017

Bit-width reduction and customized register for low cost convolutional neural network accelerator.

Kyungrak Choi, Woong Choi, Kyungho Shin, Jongsun Park

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

A DRAM based physical unclonable function capable of generating >10³² Challenge Response Pairs per 1Kbit array for secure chip authentication.

Qianying Tang, Chen Zhou, Woong Choi, Gyuseong Kang, Jongsun Park, Keshab K. Parhi, Chris H. Kim

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016

Unequal-Error-Protection Error Correction Codes for the Embedded Memories in Digital Signal Processors.

Hoyoung Tang, Jongsun Park

IEEE Trans. Very Large Scale Integr. Syst., 2016

A 0.4-mW, 4.7-ps Resolution Single-Loop ΔΣ TDC Using a Half-Delay Time Integrator.

Chan-Keun Kwon, Hoon Ki Kim, Jongsun Park, Soo-Won Kim

IEEE Trans. Very Large Scale Integr. Syst., 2016

Wearables, Implants, and Internet of Things: The Technology Needs in the Evolving Landscape.

Sandip Ray, Jongsun Park, Swarup Bhunia

IEEE Trans. Multi Scale Comput. Syst., 2016

Exploiting Serial Access and Asymmetric Read/Write of Domain Wall Memory for Area and Energy-Efficient Digital Signal Processor Design.

Jinil Chung, Kenneth Ramclam, Jongsun Park, Swaroop Ghosh

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A Charge-Recycling Assist Technique for Reliable and Low Power SRAM Design.

Woong Choi, Jongsun Park

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Overview of Circuits, Systems, and Applications of Spintronics.

Swaroop Ghosh, Anirudh Iyengar, Seyedhamidreza Motaman, Rekha Govindaraj, Jae-Won Jang, Jinil Chung, Jongsun Park, Xin Li, Rajiv V. Joshi, Dinesh Somasekhar

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

Customized SRAM design for low power video code applications.

Sangkyu Lee, Hoyoung Tang, Kyungrak Choi, Jongsun Park

Proceedings of the International SoC Design Conference, 2016

Domain Wall Memory based Convolutional Neural Networks for Bit-width Extendability and Energy-Efficiency.

Jinil Chung, Jongsun Park, Swaroop Ghosh

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

A compact multi-mode CORDIC with Global-Shifting-Sum (GSS) method.

Gihoon Jung, Kyungrak Choi, Jongsun Park

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015

Guest Editors' Introduction: Wearables, Implants, and Internet of Things.

Sandip Ray, Jongsun Park, Swarup Bhunia

IEEE Trans. Multi Scale Comput. Syst., 2015

D²ART: Direct Data Accessing from Passive RFID Tag for infra-less, contact-less, and battery-less pervasive computing.

Joon Goo Lee, Seon Wook Kim, Dong-Hyun Kim, Younga Cho, Jae-Sung Rieh, Gyusung Kang, Jongsun Park, Hokyu Lee, Sejin Park, Chulwoo Kim

Microprocess. Microsystems, 2015

A Refresh-Less eDRAM Macro With Embedded Voltage Reference and Selective Read for an Area and Power Efficient Viterbi Decoder.

Woong Choi, Gyuseong Kang, Jongsun Park

IEEE J. Solid State Circuits, 2015

A hybrid multimode BCH encoder architecture for area efficient re-encoding approach.

Hoyoung Tang, Gihoon Jung, Jongsun Park

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Self-correcting STTRAM under magnetic field attacks.

Jae-Won Jang, Jongsun Park, Swaroop Ghosh, Swarup Bhunia

Proceedings of the 52nd Annual Design Automation Conference, 2015

Domain wall memory based digital signal processors for area and energy-efficiency.

Jinil Chung, Kenneth Ramclam, Jongsun Park, Swaroop Ghosh

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

Reconfigurable CORDIC-Based Low-Power DCT Architecture Based on Data Priority.

Min-Woo Lee, Ji-Hwan Yoon, Jongsun Park

IEEE Trans. Very Large Scale Integr. Syst., 2014

Improving Energy Efficiency in FPGA Through Judicious Mapping of Computation to Embedded Memory Blocks.

Anandaroop Ghosh, Somnath Paul, Jongsun Park, Swarup Bhunia

IEEE Trans. Very Large Scale Integr. Syst., 2014

VL-ECC: Variable Data-Length Error Correction Code for Embedded Memory in DSP Applications.

Jangwon Park, Jongsun Park, Swarup Bhunia

IEEE Trans. Circuits Syst. II Express Briefs, 2014

An Efficient Memory-Address Remapping Technique for High-Throughput QC-LDPC Decoder.

Ji-Hwan Yoon, Jongsun Park

Circuits Syst. Signal Process., 2014

A low-complexity composite QR decomposition architecture for MIMO detector.

Ji-Hwan Yoon, Dongyeob Shin, Jongsun Park

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Priority Based Error Correction Code (ECC) for the Embedded SRAM Memories in H.264 System.

Insoo Lee, Jinmo Kwon, Jangwon Park, Jongsun Park

J. Signal Process. Syst., 2013

Design and Implementation of an On-Chip Permutation Network for Multiprocessor System-On-Chip.

Phi-Hung Pham, Junyoung Song, Jongsun Park, Chulwoo Kim

IEEE Trans. Very Large Scale Integr. Syst., 2013

Design of Wavelet-Based ECG Detector for Implantable Cardiac Pacemakers.

Young-Jae Min, Hoon Ki Kim, Yu-Ri Kang, Gil-Su Kim, Jongsun Park, Soo-Won Kim

IEEE Trans. Biomed. Circuits Syst., 2013

Reconfigurable ECC for adaptive protection of memory.

Abhishek Basak, Somnath Paul, Jangwon Park, Jongsun Park, Swarup Bhunia

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Multidimensional Householder based high-speed QR decomposition architecture for MIMO receivers.

Iput Heri Kurniawan, Ji-Hwan Yoon, Jongsun Park

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

Design and Implementation of Backtracking Wave-Pipeline Switch to Support Guaranteed Throughput in Network-on-Chip.

Phi-Hung Pham, Jongsun Park, Phuong Mau, Chulwoo Kim

IEEE Trans. Very Large Scale Integr. Syst., 2012

Resource Efficient Implementation of Low Power MB-OFDM PHY Baseband Modem With Highly Parallel Architecture.

Seokjoong Hwang, Youngsun Han, Seon Wook Kim, Jongsun Park, Byung Gueon Min

IEEE Trans. Very Large Scale Integr. Syst., 2012

Adaptive Clock Generation Technique for Variation-Aware Subthreshold Logics.

Woojin Rim, Woong Choi, Jongsun Park

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Heterogeneous SRAM Cell Sizing for Low-Power H.264 Applications.

Jinmo Kwon, Ik Joon Chang, Insoo Lee, Heemin Park, Jongsun Park

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

High-speed tournament givens rotation-based QR Decomposition Architecture for MIMO Receiver.

Min-Woo Lee, Ji-Hwan Yoon, Jongsun Park

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Dual queue based rate selecting schedule for throughput enhancement in WLANs.

Dongwan Kim, Wan-Seon Lim, Jongsun Park

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

A Reconfigurable FIR Filter Architecture to Trade Off Filter Performance for Dynamic Power Consumption.

Seok-Jae Lee, Ji-Woong Choi, Seon Wook Kim, Jongsun Park

IEEE Trans. Very Large Scale Integr. Syst., 2011

A Jitter and Power Analysis on DCO.

Doo-Chan Lee, Kyu-Young Kim, Young-Jae Min, Jongsun Park, Soo-Won Kim

IEEE Trans. Circuits Syst. II Express Briefs, 2011

An Energy Efficient V_PP Generator With Fast Ramp-Up Time for Mobile DRAM.

Kyu-Young Kim, Yonghwan Kim, Doo-Chan Lee, Yu-Ri Kang, Hoon Ki Kim, Soo-Won Kim, Jongsun Park

IEEE J. Solid State Circuits, 2011

Low-power programmable divider with a shared counter for frequency synthesiser.

Kyu-Young Kim, Young-Jae Min, Soo-Won Kim, Jongsun Park

IET Circuits Devices Syst., 2011

Improved MIMO SIC Detection Exploiting ML Criterion.

Ji-Woong Choi, Jungwon Lee, Hui-Ling Lou, Jongsun Park

Proceedings of the 74th IEEE Vehicular Technology Conference, 2011

2010

Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering.

Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunsoo Choo, Jongsun Park, Woopyo Jeong, Kaushik Roy

J. Signal Process. Syst., 2010

Dynamic Bit-Width Adaptation in DCT: An Approach to Trade Off Image Quality and Computation Energy.

Jongsun Park, Jung Hwan Choi, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2010

Energy Efficient Hardware Architecture of LU Triangularization for MIMO Receiver.

Ji-Woong Choi, Jungwon Lee, Byung Gueon Min, Jongsun Park

IEEE Trans. Circuits Syst. II Express Briefs, 2010

Hydrogen passivation effects under negative bias temperature instability stress in metal/silicon-oxide/silicon-nitride/silicon-oxide/silicon capacitors for flash memories.

Hee-Dong Kim, Ho-Myoung An, Yujeong Seo, Yongjie Zhang, Jongsun Park, Tae Geun Kim

Microelectron. Reliab., 2010

Fast and accurate estimation of SRAM read and hold failure probability using critical point sampling.

Ik Joon Chang, Jongsun Park, Kunhyuk Kang, Kaushik Roy

IET Circuits Devices Syst., 2010

ProMINoC: An efficient Network-on-Chip design for flexible data permutation.

Phi-Hung Pham, Jongsun Park, Chulwoo Kim

IEICE Electron. Express, 2010

2009

A packet forwarding controller for mobile IP-based networks with packet buffering.

Seung Beom Lee, Kyeong Hur, Jongsun Park, Doo Seop Eom

IEEE Trans. Consumer Electron., 2009

A distributed MAC design for data collision-free wireless USB home networks.

Jin-Woo Kim, Kyeong Hur, Jongsun Park, Doo Seop Eom

IEEE Trans. Consumer Electron., 2009

A fair distributed resource allocation method in UWB wireless PANs with WiMedia MAC.

Seokhwan Kim, Kyeong Hur, Jongsun Park, Doo Seop Eom, Kwang-il Hwang

J. Commun. Networks, 2009

Enhancing Location Estimation and Reducing Computation using Adaptive Zone Based K-NNSS Algorithm.

Sung-Hak Song, Chang-Hoon Lee, Ju-Hyun Park, Kyo-Jun Koo, Jong-Kook Kim, Jongsun Park

KSII Trans. Internet Inf. Syst., 2009

Soft MIMO ML demodulation based on bitwise constellation partitioning.

Jungwon Lee, Ji-Woong Choi, Hui-Ling Lou, Jongsun Park

IEEE Commun. Lett., 2009

2008

A Low Complexity Reconfigurable DCT Architecture to Trade off Image Quality for Power Consumption.

Jongsun Park, Kaushik Roy

J. Signal Process. Syst., 2008

2006

Efficient modeling of 1/f^alpha/ noise using multirate process.

Jongsun Park, Khurram Muhammad, Kaushik Roy

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off.

Jongsun Park, Jung Hwan Choi, Kaushik Roy

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2004

Computation sharing programmable FIR filter for low-power and high-performance applications.

Jongsun Park, Woopyo Jeong, Hamid Mahmoodi-Meimand, Yongtao Wang, Hunsoo Choo, Kaushik Roy

IEEE J. Solid State Circuits, 2004

Hardware architecture and VLSI implementation of a low-power high-performance polyphase channelizer with applications to subband adaptive filtering.

Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunsoo Choo, Jongsun Park, Woopyo Jeong, Kaushik Roy

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

A low power reconfigurable DCT architecture to trade off image quality for computational complexity.

Jongsun Park, Kaushik Roy

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003

High-performance FIR filter design based on sharing multiplication.

Jongsun Park, Khurram Muhammad, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2003

Efficient generation of 1/f^α noise using a multi-rate filter bank.

Jongsun Park, Khurram Muhammad, Kaushik Roy

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

High performance and low power FIR filter design based on sharing multiplication.

Jongsun Park, Woopyo Jeong, Hunsoo Choo, Hamid Mahmoodi-Meimand, Yongtao Wang, Kaushik Roy

Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

Low power reconfigurable DCT design based on sharing multiplication.

Jongsun Park, Soonkeon Kwon, Kaushik Roy

Proceedings of the IEEE International Conference on Acoustics, 2002

2000

Non-adaptive and adaptive filter implementation based on sharing multiplication.

Jongsun Park, Hunsoo Choo, Khurram Muhammad, Seung Hoon Choi, Yonghee Im, Kaushik Roy

Proceedings of the IEEE International Conference on Acoustics, 2000