Jong-Hyeok Yoon
Orcid: 0000-0001-7373-7028
According to our database1,
Jong-Hyeok Yoon
authored at least 31 papers
between 2014 and 2024.
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Bibliography
2024
A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO-ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
BEE-SLAM: A 65nm 17.96 TOPS/W 97.55%-Sparse-Activity Hybrid Mixed-Signal/Digital Multi-Agent Neuromorphic SLAM Accelerator for Swarm Robotics.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
A 1V-Supply $1.85\mathrm{V}_{\text{PP}}$ -Input-Range 1kHz-BW 181.9dB-FOMDR179.4dB-FOMSNDR 2<sup>nd</sup>-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A PRAM-based PIM Macro Using the Gilbert Multiplier-based Active Feedback and Input-aware SAR ADC.
Proceedings of the 20th International SoC Design Conference, 2023
2022
BitS-Net: Bit-Sparse Deep Neural Network for Energy-Efficient RRAM-Based Compute-In-Memory.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding.
IEEE J. Solid State Circuits, 2022
A 40-nm, 64-Kb, 56.67 TOPS/W Voltage-Sensing Computing-In-Memory/Digital RRAM Macro Supporting Iterative Write With Verification and Online Read-Disturb Detection.
IEEE J. Solid State Circuits, 2022
A Neuromorphic SLAM Accelerator Supporting Multi-Agent Error Correction in Swarm Robotics.
Proceedings of the 19th International SoC Design Conference, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
DualPIM: A Dual-Precision and Low-Power CNN Inference Engine Using SRAM- and eDRAM-based Processing-in-Memory Arrays.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
NeuroSLAM: A 65-nm 7.25-to-8.79-TOPS/W Mixed-Signal Oscillator-Based SLAM Accelerator for Edge Robotics.
IEEE J. Solid State Circuits, 2021
29.1 A 40nm 64Kb 56.67TOPS/W Read-Disturb-Tolerant Compute-in-Memory/Digital RRAM Macro with Active-Feedback-Based Read and In-Situ Write Verification.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
A 40nm 100Kb 118.44TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
CIM-SECDED: A 40nm 64Kb Compute In-Memory RRAM Macro with ECC Enabling Reliable Operation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
3.125-to-28.125 Gb/s 4.72 mW/Gb/s Multi- Standard Parallel Transceiver Supporting Channel-Independent Operation in 40-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
A Framed-Pulsewidth Modulation Transceiver for High-Speed Broadband Communication Links.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
31.1 A 65nm 8.79TOPS/W 23.82mW Mixed-Signal Oscillator-Based NeuroSLAM Accelerator for Applications in Edge Robotics.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
An Electronic Dispersion Compensation Transceiver for 10- and 28-Gb/s Directly Modulated Lasers-Based Optical Links.
IEEE J. Solid State Circuits, 2019
2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A 3.125-to-28.125 Gb/s multi-standard transceiver with a fully channel-independent operation in 40nm CMOS.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
IEEE J. Solid State Circuits, 2017
2016
A 4×10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2016
2015
IEEE J. Solid State Circuits, 2015
A 6 Gb/s Transceiver With a Nonlinear Electronic Dispersion Compensator for Directly Modulated Distributed-Feedback Lasers.
IEEE J. Solid State Circuits, 2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
A 10-Gb/s CDR With an Adaptive Optimum Loop-Bandwidth Calibrator for Serial Communication Links.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
8.1 A 6Gb/s transceiver with a nonlinear electronic dispersion compensator for directly modulated distributed-feedback lasers.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014