Jong-Ho Bae

Orcid: 0000-0002-1786-7132

According to our database1, Jong-Ho Bae authored at least 21 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Development of an In-Pipe Inspection Robot for Large-Diameter Water Pipes.
Sensors, June, 2024

Si-Based Dual-Gate Field-Effect Transistor Array for Low-Power On-Chip Trainable Hardware Neural Networks.
Adv. Intell. Syst., January, 2024

Improvement of the Symmetry and Linearity of Synaptic Weight Update by Combining the InGaZnO Synaptic Transistor and Memristor.
IEEE Access, 2024

2023
Analog Synaptic Devices Based on IGZO Thin-Film Transistors with a Metal-Ferroelectric-Metal-Insulator-Semiconductor Structure for High-Performance Neuromorphic Systems.
Adv. Intell. Syst., December, 2023

1/<i>f</i> Noise in Synaptic Ferroelectric Tunnel Junction: Impact on Convolutional Neural Network.
Adv. Intell. Syst., June, 2023

Short- and Long-Term Memory Based on a Floating-Gate IGZO Synaptic Transistor.
IEEE Access, 2023

2021
On-chip trainable hardware-based deep Q-networks approximating a backpropagation algorithm.
Neural Comput. Appl., 2021

Hardware-based spiking neural network architecture using simplified backpropagation algorithm and homeostasis functionality.
Neurocomputing, 2021

Pulse-Width Modulation Neuron Implemented by Single Positive-Feedback Device.
CoRR, 2021

Spiking Neural Networks With Time-to-First-Spike Coding Using TFT-Type Synaptic Device Model.
IEEE Access, 2021

Threshold-Variation-Tolerant Coupling-Gate α-IGZO Synaptic Transistor for More Reliably Controllable Hardware Neuromorphic System.
IEEE Access, 2021

Vertical and lateral charge losses during short time retention in 3-D NAND flash memory.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2020
Efficient precise weight tuning protocol considering variation of the synaptic devices and target accuracy.
Neurocomputing, 2020

Low-Power and High-Density Neuron Device for Simultaneous Processing of Excitatory and Inhibitory Signals in Neuromorphic Systems.
IEEE Access, 2020

Reliability of Ferroelectric HfO2-based Memories: From MOS Capacitor to FeFET.
Proceedings of the 2020 Device Research Conference, 2020

2019
Adaptive learning rule for hardware-based deep neural networks using electronic synapse devices.
Neural Comput. Appl., 2019

Investigation of Neural Networks Using Synapse Arrays Based on Gated Schottky Diodes.
Proceedings of the International Joint Conference on Neural Networks, 2019

A Spiking Neural Network with a Global Self-Controller for Unsupervised Learning Based on Spike-Timing-Dependent Plasticity Using Flash Memory Synaptic Devices.
Proceedings of the International Joint Conference on Neural Networks, 2019

Review of candidate devices for neuromorphic applications.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Hardware-based Neural Networks using a Gated Schottky Diode as a Synapse Device.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Adaptive Learning Rule for Hardware-based Deep Neural Networks Using Electronic Synapse Devices.
CoRR, 2017


  Loading...