Jon J. Pimentel

Orcid: 0000-0002-0833-0392

According to our database1, Jon J. Pimentel authored at least 8 papers between 2014 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2018
Ristretto: A Framework for Empirical Study of Resource-Efficient Inference in Convolutional Neural Networks.
IEEE Trans. Neural Networks Learn. Syst., 2018

2017
Hybrid Hardware/Software Floating-Point Implementations for Optimized Area and Throughput Tradeoffs.
IEEE Trans. Very Large Scale Integr. Syst., 2017

KiloCore: A Fine-Grained 1, 000-Processor Array for Task-Parallel Applications.
IEEE Micro, 2017

KiloCore: A 32-nm 1000-Processor Computational Array.
IEEE J. Solid State Circuits, 2017

2016
A 5.8 pJ/Op 115 billion ops/sec, to 1.78 trillion ops/sec 32nm 1000-processor array.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

KiloCore: A 32 nm 1000-processor array.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

2015
Area efficient backprojection computation with reduced floating-point word width for SAR image formation.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

2014
Hybrid floating-point modules with low area overhead on a fine-grained processing core.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014


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